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Message-ID: <e1cf3666-fecc-4272-b91b-5921ada45ade@lunn.ch>
Date: Thu, 29 Jun 2023 15:23:48 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Luo Jie <quic_luoj@...cinc.com>
Cc: hkallweit1@...il.com, davem@...emloft.net, edumazet@...gle.com,
	kuba@...nel.org, pabeni@...hat.com, linux@...linux.org.uk,
	netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
	quic_sricharan@...cinc.com
Subject: Re: [PATCH 3/3] net: phy: at803x: add qca8081 fifo reset on the link
 down

> +static int qca808x_fifo_reset(struct phy_device *phydev)
> +{
> +	/* Reset serdes fifo on link down, Release serdes fifo on link up,
> +	 * the serdes address is phy address added by 1.
> +	 */
> +	return mdiobus_c45_modify_changed(phydev->mdio.bus, phydev->mdio.addr + 1,
> +			MDIO_MMD_PMAPMD, QCA8081_PHY_SERDES_MMD1_FIFO_CTRL,
> +			QCA8081_PHY_FIFO_RSTN, phydev->link ? QCA8081_PHY_FIFO_RSTN : 0);

In polling mode, this is going to be called once per second. Do you
really want to be setting that register all the time? Consider using
the link_change_notify callback.

Also, can you tell us more about this SERDES device on the bus. I just
want to make sure this is not a PCS and should have its own driver.

     Andrew

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