netdev - Re: [PATCH 1/3] net: phy: at803x: support qca8081 1G chip type

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Message-ID: <48ad596c-07ee-9721-7ae5-c524d8f4d3e7@quicinc.com>
Date: Sat, 1 Jul 2023 23:42:55 +0800
From: Jie Luo <quic_luoj@...cinc.com>
To: Andrew Lunn <andrew@...n.ch>
CC: <hkallweit1@...il.com>, <davem@...emloft.net>, <edumazet@...gle.com>,
        <kuba@...nel.org>, <pabeni@...hat.com>, <linux@...linux.org.uk>,
        <netdev@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 1/3] net: phy: at803x: support qca8081 1G chip type



On 7/1/2023 10:30 PM, Andrew Lunn wrote:
>> There are MMD device 1, 3, 7 in qca8081 PHY, the PMA abilities
>> 10/100/1000/2500 are compliant with genphy_c45_pma_read_abilities, but the
>> MDIO_AN_STAT1_ABLE does not exist in MMD7.1 register.
>>
>> so the genphy_c45_pma_read_abilities can't be fully supported by qca8081
>> phy, sorry for this misunderstanding.
> 
> If all you are missing is MDIO_AN_STAT1_ABLE, then i assume you are
> missing Autoneg? So have your tried using
> genphy_c45_pma_read_abilities() and then just doing:
> 
>                          linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
>                                           phydev->supported);
> 
> with a comment explaining why.
> 
> 	Andrew					
Thanks Andrew for this suggestion, i will verify this code and update 
the patch series.