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Message-ID: <20230705172759.1610753-8-gatien.chevallier@foss.st.com>
Date: Wed, 5 Jul 2023 19:27:56 +0200
From: Gatien Chevallier <gatien.chevallier@...s.st.com>
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CC: <linux-crypto@...r.kernel.org>, <devicetree@...r.kernel.org>,
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Gatien Chevallier
<gatien.chevallier@...s.st.com>
Subject: [PATCH 07/10] arm64: dts: st: add RIFSC as a domain controller for STM32MP25x boards
RIFSC is a firewall controller. Change its compatible so that is matches
the documentation and reference RIFSC as a feature-domain-controller.
Signed-off-by: Gatien Chevallier <gatien.chevallier@...s.st.com>
---
arch/arm64/boot/dts/st/stm32mp251.dtsi | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi
index 5268a4321841..62101084cab8 100644
--- a/arch/arm64/boot/dts/st/stm32mp251.dtsi
+++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi
@@ -106,17 +106,20 @@ soc@0 {
ranges = <0x0 0x0 0x0 0x80000000>;
rifsc: rifsc-bus@...80000 {
- compatible = "simple-bus";
+ compatible = "st,stm32mp25-rifsc";
reg = <0x42080000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
+ feature-domain-controller;
+ #feature-domain-cells = <1>;
usart2: serial@...e0000 {
compatible = "st,stm32h7-uart";
reg = <0x400e0000 0x400>;
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ck_flexgen_08>;
+ feature-domains = <&rifsc 32>;
status = "disabled";
};
};
--
2.25.1
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