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Message-Id: <20230710175621.8612-3-vesa.jaaskelainen@vaisala.com>
Date: Mon, 10 Jul 2023 20:56:20 +0300
From: Vesa Jääskeläinen <vesa.jaaskelainen@...sala.com>
To:
Cc: vesa.jaaskelainen@...sala.com,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Andrew Lunn <andrew@...n.ch>,
Heiner Kallweit <hkallweit1@...il.com>,
Russell King <linux@...linux.org.uk>,
Andrew Davis <afd@...com>,
netdev@...r.kernel.org,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: [PATCH 2/2] net: phy: dp83822: Add support for line class driver configuration
Line driver can be configured either in Class A or in Class B modes.
By default the PHY is in Class B mode.
Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@...sala.com>
---
drivers/net/phy/dp83822.c | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/drivers/net/phy/dp83822.c b/drivers/net/phy/dp83822.c
index b7cb71817780..5c144d22b64e 100644
--- a/drivers/net/phy/dp83822.c
+++ b/drivers/net/phy/dp83822.c
@@ -31,12 +31,17 @@
#define MII_DP83822_FCSCR 0x14
#define MII_DP83822_RCSR 0x17
#define MII_DP83822_RESET_CTRL 0x1f
+#define MII_DP83822_LDCSEL 0x404
#define MII_DP83822_GENCFG 0x465
#define MII_DP83822_SOR1 0x467
/* GENCFG */
#define DP83822_SIG_DET_LOW BIT(0)
+/* Line Driver Class Selection (LDCSEL) */
+#define DP83822_LDCSEL_CLASS_A 0x24
+#define DP83822_LDCSEL_CLASS_B 0x20
+
/* Control Register 2 bits */
#define DP83822_FX_ENABLE BIT(14)
@@ -118,6 +123,7 @@ struct dp83822_private {
bool fx_signal_det_low;
int fx_enabled;
u16 fx_sd_enable;
+ bool line_driver_class_a;
};
static int dp83822_set_wol(struct phy_device *phydev,
@@ -416,6 +422,16 @@ static int dp83822_config_init(struct phy_device *phydev)
MII_DP83822_RCSR, DP83822_RGMII_MODE_EN);
}
+ /* Configure line driver class */
+ if (dp83822->line_driver_class_a)
+ /* full MLT-3 on both Tx+ and Tx–.*/
+ phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_LDCSEL,
+ DP83822_LDCSEL_CLASS_A);
+ else
+ /* reduced MLT-3 */
+ phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_LDCSEL,
+ DP83822_LDCSEL_CLASS_B);
+
if (dp83822->fx_enabled) {
err = phy_modify(phydev, MII_DP83822_CTRL_2,
DP83822_FX_ENABLE, 1);
@@ -507,6 +523,12 @@ static int dp83822_of_init(struct phy_device *phydev)
dp83822->fx_enabled = device_property_present(dev,
"ti,fiber-mode");
+ /* DP83822 defaults to line driver class B - enable configuration for
+ * class A
+ */
+ dp83822->line_driver_class_a = device_property_present(dev,
+ "ti,line-driver-class-a");
+
return 0;
}
#else
--
2.34.1
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