netdev - [PATCH RFC/RFT net-next 0/3] net: stmmac: Increase clk_ptp

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Message-ID: <20230711205732.364954-1-ahalaney@redhat.com>
Date: Tue, 11 Jul 2023 15:35:29 -0500
From: Andrew Halaney <ahalaney@...hat.com>
To: linux-kernel@...r.kernel.org
Cc: linux-arm-kernel@...ts.infradead.org,
	linux-stm32@...md-mailman.stormreply.com,
	netdev@...r.kernel.org,
	mcoquelin.stm32@...il.com,
	pabeni@...hat.com,
	kuba@...nel.org,
	edumazet@...gle.com,
	davem@...emloft.net,
	joabreu@...opsys.com,
	alexandre.torgue@...s.st.com,
	peppe.cavallaro@...com,
	bhupesh.sharma@...aro.org,
	vkoul@...nel.org,
	linux-arm-msm@...r.kernel.org,
	jsuraj@....qualcomm.com,
	Andrew Halaney <ahalaney@...hat.com>
Subject: [PATCH RFC/RFT net-next 0/3] net: stmmac: Increase clk_ptp_ref rate

DO NOT MERGE, patch 2 and 3 are duplications at differing levels
(platform vs driver wide). They work fine together but it makes no sense
to take both.

Disclosure: I don't know much about PTP beyond what you can google in an
afternoon, don't have access to documentation about the stmmac IP,
and have only tested that (based on code comments and git commit
history) the programming of the subsecond register (and the clock rate)
makes more sense with these changes.

I'm hoping to start some discussion and get some insight about this.
Recently I found myself discussing PTP and some possible changes from
downstream that might need to be upstreamed. In doing so, I noticed that
the PTP reference clock (clk_ptp_ref) was running at a much lower value
than was being discussed. Digging in a bit, nobody is calling
clk_set_rate() of any value on clk_ptp_ref, so you get whatever the
default rate is when enabled. On Qualcomm platforms I have access to
this results in a 19.2 MHz clock instead of a possible 230.4 MHz clock.

This series proposes setting the clock rate. Patch 2 is the "safe"
approach where a platform must handle it, patch 3 is the big hammer
where we max out the clock for all users. I think patch 2 is using
a proper callback (I want to document those a bit in the future to make
it easier for future folks using them). My guess is that doing this
driver wide might be undesirable for some reasons I'm not
aware of (right now I blindly request the max frequency but the IP
could have an upper limit here, platform maintainers maybe upset if
their careful validation at prior frequencies changes, etc).

I've only tested that the Qualcomm boards I have access to in a remote
lab still work (i.e. throughput testing, etc) and that the PTP
programming is now what I expected it to be theoretically.

I'd really appreciate someone with the ability (and know how!) to test
PTP tried this on at least the Qualcomm platforms. Bonus points if
someone explains how one would even test PTP networks like this.

Thanks,
Andrew

Andrew Halaney (3):
  net: stmmac: Make ptp_clk_freq_config variable type explicit
  net: stmmac: dwmac-qcom-ethqos: Use max frequency for clk_ptp_ref
  net: stmmac: Use the max frequency possible for clk_ptp_ref

 .../net/ethernet/stmicro/stmmac/dwmac-intel.c  |  3 +--
 .../stmicro/stmmac/dwmac-qcom-ethqos.c         | 18 ++++++++++++++++++
 .../ethernet/stmicro/stmmac/stmmac_platform.c  |  5 +++++
 include/linux/stmmac.h                         |  4 +++-
 4 files changed, 27 insertions(+), 3 deletions(-)

-- 
2.41.0