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Message-ID: <DM6PR11MB465701C009D1DC2972F900F29B36A@DM6PR11MB4657.namprd11.prod.outlook.com>
Date: Wed, 12 Jul 2023 09:19:53 +0000
From: "Kubalewski, Arkadiusz" <arkadiusz.kubalewski@...el.com>
To: Jakub Kicinski <kuba@...nel.org>
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Subject: RE: [RFC PATCH v9 00/10] Create common DPLL configuration API
>From: Jakub Kicinski <kuba@...nel.org>
>Sent: Tuesday, July 11, 2023 10:15 PM
>
>On Tue, 11 Jul 2023 17:17:51 +0000 Kubalewski, Arkadiusz wrote:
>> >I think better to add the check to pin-register so future synce pin
>> >users don't have similar weird ideas. Could you please add this check?
>>
>> Don't think it is way to go, and I don't think there is anything good
>> with preventing device drivers from labeling their pins the way they
>>want.
>
>We had a long argument about how label should have a clearly defined
>meaning. We're not going to rehash it on every revision. What did I miss :|
Well, as I understand we are discussing if dpll subsystem shall prevent
labeling the SyncE type pins. I have labeled them in ice explicitly with
the name of a pci device they belong to.
You haven't miss much, mostly the problem is described in this thread.
Thank you!
Arkadiusz
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