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Message-ID: <ZLhgqSaAfTwYGlxn@makrotopia.org>
Date: Wed, 19 Jul 2023 23:16:09 +0100
From: Daniel Golle <daniel@...rotopia.org>
To: Rob Herring <robh@...nel.org>
Cc: "David S. Miller" <davem@...emloft.net>,
	Eric Dumazet <edumazet@...gle.com>,
	Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
	Conor Dooley <conor+dt@...nel.org>, Felix Fietkau <nbd@....name>,
	John Crispin <john@...ozen.org>, Sean Wang <sean.wang@...iatek.com>,
	Mark Lee <Mark-MC.Lee@...iatek.com>,
	Lorenzo Bianconi <lorenzo@...nel.org>,
	Matthias Brugger <matthias.bgg@...il.com>,
	AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>,
	Russell King <linux@...linux.org.uk>,
	Florian Fainelli <f.fainelli@...il.com>,
	Greg Ungerer <gerg@...nel.org>,
	Bjørn Mork <bjorn@...k.no>,
	netdev@...r.kernel.org, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	linux-mediatek@...ts.infradead.org
Subject: Re: [PATCH net-next v3 2/9] dt-bindings: net: mediatek,net: add
 mt7988-eth binding

On Wed, Jul 19, 2023 at 04:13:20PM -0600, Rob Herring wrote:
> On Tue, Jul 18, 2023 at 10:30:33PM +0100, Daniel Golle wrote:
> > Introduce DT bindings for the MT7988 SoC to mediatek,net.yaml.
> > The MT7988 SoC got 3 Ethernet MACs operating at a maximum of
> > 10 Gigabit/sec supported by 2 packet processor engines for
> > offloading tasks.
> > The first MAC is hard-wired to a built-in switch which exposes
> > four 1000Base-T PHYs as user ports.
> > It also comes with built-in 2500Base-T PHY which can be used
> > with the 2nd GMAC.
> > The 2nd and 3rd GMAC can be connected to external PHYs or provide
> > SFP(+) cages attached via SGMII, 1000Base-X, 2500Base-X, USXGMII,
> > 5GBase-KR or 10GBase-KR.
> > 
> > Signed-off-by: Daniel Golle <daniel@...rotopia.org>
> > ---
> >  .../devicetree/bindings/net/mediatek,net.yaml | 74 +++++++++++++++++--
> >  1 file changed, 69 insertions(+), 5 deletions(-)
> > 
> > diff --git a/Documentation/devicetree/bindings/net/mediatek,net.yaml b/Documentation/devicetree/bindings/net/mediatek,net.yaml
> > index 38aa3d97ee234..ae2062f3c1833 100644
> > --- a/Documentation/devicetree/bindings/net/mediatek,net.yaml
> > +++ b/Documentation/devicetree/bindings/net/mediatek,net.yaml
> > @@ -24,6 +24,7 @@ properties:
> >        - mediatek,mt7629-eth
> >        - mediatek,mt7981-eth
> >        - mediatek,mt7986-eth
> > +      - mediatek,mt7988-eth
> >        - ralink,rt5350-eth
> >  
> >    reg:
> > @@ -61,6 +62,12 @@ properties:
> >        Phandle to the mediatek hifsys controller used to provide various clocks
> >        and reset to the system.
> >  
> > +  mediatek,infracfg:
> > +    $ref: /schemas/types.yaml#/definitions/phandle
> > +    description:
> > +      Phandle to the syscon node that handles the path from GMAC to
> > +      PHY variants.
> > +
> >    mediatek,sgmiisys:
> >      $ref: /schemas/types.yaml#/definitions/phandle-array
> >      minItems: 1
> > @@ -229,11 +236,7 @@ allOf:
> >              - const: sgmii_ck
> >              - const: eth2pll
> >  
> > -        mediatek,infracfg:
> > -          $ref: /schemas/types.yaml#/definitions/phandle
> > -          description:
> > -            Phandle to the syscon node that handles the path from GMAC to
> > -            PHY variants.
> > +        mediatek,infracfg: true
> 
> You don't need this. What you need is 'mediatek,infracfg: false' in the 
> if/then schemas for the cases it should not be present.
> 

Ack, will do in the next round. Thanks!

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