[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <ZLqfJZi/14dyEzhH@smile.fi.intel.com>
Date: Fri, 21 Jul 2023 18:07:17 +0300
From: Andy Shevchenko <andy@...nel.org>
To: Marcin Szycik <marcin.szycik@...ux.intel.com>
Cc: intel-wired-lan@...ts.osuosl.org, netdev@...r.kernel.org,
wojciech.drewek@...el.com, michal.swiatkowski@...ux.intel.com,
aleksander.lobakin@...el.com, davem@...emloft.net, kuba@...nel.org,
jiri@...nulli.us, pabeni@...hat.com, jesse.brandeburg@...el.com,
simon.horman@...igine.com, idosch@...dia.com
Subject: Re: [PATCH iwl-next v3 6/6] ice: Add support for PFCP hardware
offload in switchdev
On Fri, Jul 21, 2023 at 09:15:32AM +0200, Marcin Szycik wrote:
> Add support for creating PFCP filters in switchdev mode. Add support
> for parsing PFCP-specific tc options: S flag and SEID.
>
> To create a PFCP filter, a special netdev must be created and passed
> to tc command:
>
> ip link add pfcp0 type pfcp
> tc filter add dev eth0 ingress prio 1 flower pfcp_opts \
> 1:123/ff:fffffffffffffff0 skip_hw action mirred egress redirect dev pfcp0
Can you indent this (by 2 spaces?) to differentiate with the commit message
itself?
> Changes in iproute2 [1] are required to be able to use pfcp_opts in tc.
>
> ICE COMMS package is required to create a filter as it contains PFCP
> profiles.
> [1] https://lore.kernel.org/netdev/20230614091758.11180-1-marcin.szycik@linux.intel.com
We have Link: tag for such kind of stuff.
...
> + if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ENC_OPTS) &&
> + fltr->tunnel_type == TNL_PFCP) {
> + struct flow_match_enc_opts match;
> +
> + flow_rule_match_enc_opts(rule, &match);
> +
> + memcpy(&fltr->pfcp_meta_keys, &match.key->data[0],
> + sizeof(struct pfcp_metadata));
Why not simply
match.key->data
?
> + memcpy(&fltr->pfcp_meta_masks, &match.mask->data[0],
> + sizeof(struct pfcp_metadata));
Ditto.
> + fltr->flags |= ICE_TC_FLWR_FIELD_PFCP_OPTS;
> + }
...
> #ifndef _ICE_TC_LIB_H_
> #define _ICE_TC_LIB_H_
Seems bits.h is missing...
> +#include <net/pfcp.h>
> +
> #define ICE_TC_FLWR_FIELD_DST_MAC BIT(0)
> #define ICE_TC_FLWR_FIELD_SRC_MAC BIT(1)
> #define ICE_TC_FLWR_FIELD_VLAN BIT(2)
...
> #define ICE_TC_FLWR_FIELD_VLAN_PRIO BIT(27)
> #define ICE_TC_FLWR_FIELD_CVLAN_PRIO BIT(28)
> #define ICE_TC_FLWR_FIELD_VLAN_TPID BIT(29)
> +#define ICE_TC_FLWR_FIELD_PFCP_OPTS BIT(30)
>
> #define ICE_TC_FLOWER_MASK_32 0xFFFFFFFF
...and (at least) this can utilize GENMASK().
--
With Best Regards,
Andy Shevchenko
Powered by blists - more mailing lists