netdev - Re: RE: [PATCH v2 1/3] arm64: dts: imx93: add the Flex-CAN stop mode by GPR

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Message-ID: <20230726-expedited-clinking-3e7f212352f7-mkl@pengutronix.de>
Date: Wed, 26 Jul 2023 13:12:56 +0200
From: Marc Kleine-Budde <mkl@...gutronix.de>
To: Bough Chen <haibo.chen@....com>
Cc: "robh+dt@...nel.org" <robh+dt@...nel.org>,
	"krzysztof.kozlowski+dt@...aro.org" <krzysztof.kozlowski+dt@...aro.org>,
	"conor+dt@...nel.org" <conor+dt@...nel.org>,
	"shawnguo@...nel.org" <shawnguo@...nel.org>,
	"s.hauer@...gutronix.de" <s.hauer@...gutronix.de>,
	"wg@...ndegger.com" <wg@...ndegger.com>,
	"kernel@...gutronix.de" <kernel@...gutronix.de>,
	dl-linux-imx <linux-imx@....com>,
	"davem@...emloft.net" <davem@...emloft.net>,
	"edumazet@...gle.com" <edumazet@...gle.com>,
	"kuba@...nel.org" <kuba@...nel.org>,
	"pabeni@...hat.com" <pabeni@...hat.com>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-can@...r.kernel.org" <linux-can@...r.kernel.org>,
	"netdev@...r.kernel.org" <netdev@...r.kernel.org>
Subject: Re: RE: [PATCH v2 1/3] arm64: dts: imx93: add the Flex-CAN stop mode
 by GPR

On 26.07.2023 11:10:10, Bough Chen wrote:
> > >  arch/arm64/boot/dts/freescale/imx93.dtsi | 2 ++
> > >  1 file changed, 2 insertions(+)
> > >
> > > diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi
> > > b/arch/arm64/boot/dts/freescale/imx93.dtsi
> > > index 4ec9df78f205..d2040019e9c7 100644
> > > --- a/arch/arm64/boot/dts/freescale/imx93.dtsi
> > > +++ b/arch/arm64/boot/dts/freescale/imx93.dtsi
> > > @@ -319,6 +319,7 @@ flexcan1: can@...a0000 {
> > >  				assigned-clock-parents = <&clk
> > IMX93_CLK_SYS_PLL_PFD1_DIV2>;
> > >  				assigned-clock-rates = <40000000>;
> > >  				fsl,clk-source = /bits/ 8 <0>;
> > > +				fsl,stop-mode = <&anomix_ns_gpr 0x14 0>;
> > 
> > I think there's a typo in the mainline imx93.dtsi. AFAICS it's supposed to be
> > "aonmix_ns_gpr", not "anomix_ns_gpr". But that's a different problem to
> > patch :)
> 
> Yes, this is a typo.
> > 
> > AFAICS, according to imx93, rev2 data sheet, offset 0x14 is 76.6.1.3 QCHANNEL
> > DISABLE (QCH_DIS) and bit 0 is "GPIO1". Are you sure this is the correct reg?
> > 
> 
> Imx93 A1 doc has some update, I double confirm with the internal doc and IC team, the setting is correct.
> I also test on imx93-9x9 qsb board, system can be wakeup by this setting.

Thanks for double checking.

Marc

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