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Message-ID: <ZMu3wTCzffo1EgNY@shell.armlinux.org.uk>
Date: Thu, 3 Aug 2023 15:20:49 +0100
From: "Russell King (Oracle)" <linux@...linux.org.uk>
To: Feiyang Chen <chenfeiyang@...ngson.cn>
Cc: andrew@...n.ch, hkallweit1@...il.com, peppe.cavallaro@...com,
	alexandre.torgue@...s.st.com, joabreu@...opsys.com,
	chenhuacai@...ngson.cn, dongbiao@...ngson.cn,
	loongson-kernel@...ts.loongnix.cn, netdev@...r.kernel.org,
	loongarch@...ts.linux.dev, chris.chenfeiyang@...il.com
Subject: Re: [PATCH v3 13/16] net: stmmac: dwmac-loongson: Add 64-bit DMA and
 multi-vector support

On Thu, Aug 03, 2023 at 07:30:34PM +0800, Feiyang Chen wrote:
> Set 64-Bit DMA for specific versions. Request allocation for multi-
> vector interrupts for DWLGMAC_CORE_1_00. If it fails, fallback to
> request allocation for single interrupts.
> 
> Signed-off-by: Feiyang Chen <chenfeiyang@...ngson.cn>
> ---
>  .../ethernet/stmicro/stmmac/dwmac-loongson.c  | 83 ++++++++++++++++++-
>  1 file changed, 81 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c
> index c7790f73fe18..18bca996e1cb 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c
> @@ -6,11 +6,15 @@
>  #include <linux/pci.h>
>  #include <linux/dmi.h>
>  #include <linux/device.h>
> +#include <linux/interrupt.h>
>  #include <linux/of_irq.h>
> +#include "dwmac1000.h"
>  #include "stmmac.h"
>  
>  struct stmmac_pci_info {
>  	int (*setup)(struct pci_dev *pdev, struct plat_stmmacenet_data *plat);
> +	int (*config)(struct pci_dev *pdev, struct plat_stmmacenet_data *plat,
> +		      struct stmmac_resources *res);
>  };
>  
>  static void loongson_default_data(struct pci_dev *pdev,
> @@ -66,14 +70,54 @@ static int loongson_gmac_data(struct pci_dev *pdev,
>  	return 0;
>  }
>  
> +static int loongson_gmac_config(struct pci_dev *pdev,
> +				struct plat_stmmacenet_data *plat,
> +				struct stmmac_resources *res)
> +{
> +	u32 version = readl(res->addr + GMAC_VERSION);
> +
> +	switch (version & 0xff) {
> +	case DWLGMAC_CORE_1_00:
> +		plat->multi_msi_en = 1;
> +		plat->rx_queues_to_use = 8;
> +		plat->tx_queues_to_use = 8;
> +		plat->fix_channel_num = true;
> +		break;
> +	case DWMAC_CORE_3_50:
> +	case DWMAC_CORE_3_70:
> +		if (version & 0x00008000) {
> +			plat->host_dma_width = 64;
> +			plat->dma_cfg->dma64 = true;
> +		}
> +		break;
> +	default:
> +		break;
> +	}
> +
> +	plat->dma_reset_times = 5;
> +
> +	return 0;
> +}
> +
>  static struct stmmac_pci_info loongson_gmac_pci_info = {
>  	.setup = loongson_gmac_data,
> +	.config = loongson_gmac_config,
>  };
>  
> +static u32 get_irq_type(struct device_node *np)
> +{
> +	struct of_phandle_args oirq;
> +
> +	if (np && of_irq_parse_one(np, 0, &oirq) == 0 && oirq.args_count == 2)
> +		return oirq.args[1];
> +
> +	return IRQF_TRIGGER_RISING;
> +}
> +

I do wish that there was some IRQ maintainer I could bounce this over to
for them to comment on, because I don't believe that this should be
necessary in any driver - the irq subsystem should configure the IRQ
accordingly before the driver is probed.

But since I don't know that code, and can't be bothered at this point
to read through it and DT yet again, I don't feel qualified to comment
on this...

Maybe someone else can be bothered to comment on it...

If not, then I suppose it will have to do as-is, and maybe someone at
a later date can fix it if it needs fixing.

-- 
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!

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