netdev - [PATCH] net: phy: at803x: Improve hibernation support on start up

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [thread-next>] [day] [month] [year] [list]

Date: Fri,  4 Aug 2023 19:58:42 +0200
From: Marek Vasut <marex@...x.de>
To: netdev@...r.kernel.org
Cc: Marek Vasut <marex@...x.de>,
	"David S. Miller" <davem@...emloft.net>,
	Andrew Lunn <andrew@...n.ch>,
	Eric Dumazet <edumazet@...gle.com>,
	Heiner Kallweit <hkallweit1@...il.com>,
	Jakub Kicinski <kuba@...nel.org>,
	Oleksij Rempel <linux@...pel-privat.de>,
	Paolo Abeni <pabeni@...hat.com>,
	Russell King <linux@...linux.org.uk>,
	Wei Fang <wei.fang@....com>
Subject: [PATCH] net: phy: at803x: Improve hibernation support on start up

Toggle hibernation mode OFF and ON to wake the PHY up and
make it generate clock on RX_CLK pin for about 10 seconds.
These clock are needed during start up by MACs like DWMAC
in NXP i.MX8M Plus to release their DMA from reset. After
the MAC has started up, the PHY can enter hibernation and
disable the RX_CLK clock, this poses no problem for the MAC.

Originally, this issue has been described by NXP in commit
9ecf04016c87 ("net: phy: at803x: add disable hibernation mode support")
but this approach fully disables the hibernation support and
takes away any power saving benefit. This patch instead makes
the PHY generate the clock on start up for 10 seconds, which
should be long enough for the EQoS MAC to release DMA from
reset.

Before this patch on i.MX8M Plus board with AR8031 PHY:
"
$ ifconfig eth1 up
[   25.576734] imx-dwmac 30bf0000.ethernet eth1: Register MEM_TYPE_PAGE_POOL RxQ-0
[   25.658916] imx-dwmac 30bf0000.ethernet eth1: PHY [stmmac-1:00] driver [Qualcomm Atheros AR8031/AR8033] (irq=38)
[   26.670276] imx-dwmac 30bf0000.ethernet: Failed to reset the dma
[   26.676322] imx-dwmac 30bf0000.ethernet eth1: stmmac_hw_setup: DMA engine initialization failed
[   26.685103] imx-dwmac 30bf0000.ethernet eth1: __stmmac_open: Hw setup failed
ifconfig: SIOCSIFFLAGS: Connection timed out
"

After this patch on i.MX8M Plus board with AR8031 PHY:
"
$ ifconfig eth1 up
[   19.419085] imx-dwmac 30bf0000.ethernet eth1: Register MEM_TYPE_PAGE_POOL RxQ-0
[   19.507380] imx-dwmac 30bf0000.ethernet eth1: PHY [stmmac-1:00] driver [Qualcomm Atheros AR8031/AR8033] (irq=38)
[   19.528464] imx-dwmac 30bf0000.ethernet eth1: No Safety Features support found
[   19.535769] imx-dwmac 30bf0000.ethernet eth1: IEEE 1588-2008 Advanced Timestamp supported
[   19.544302] imx-dwmac 30bf0000.ethernet eth1: registered PTP clock
[   19.552008] imx-dwmac 30bf0000.ethernet eth1: FPE workqueue start
[   19.558152] imx-dwmac 30bf0000.ethernet eth1: configuring for phy/rgmii-id link mode
"

Signed-off-by: Marek Vasut <marex@...x.de>
---
Cc: "David S. Miller" <davem@...emloft.net>
Cc: Andrew Lunn <andrew@...n.ch>
Cc: Eric Dumazet <edumazet@...gle.com>
Cc: Heiner Kallweit <hkallweit1@...il.com>
Cc: Jakub Kicinski <kuba@...nel.org>
Cc: Oleksij Rempel <linux@...pel-privat.de>
Cc: Paolo Abeni <pabeni@...hat.com>
Cc: Russell King <linux@...linux.org.uk>
Cc: Wei Fang <wei.fang@....com>
Cc: netdev@...r.kernel.org
---
 drivers/net/phy/at803x.c | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c
index 13c4121fa3092..8cb7b39c6cddc 100644
--- a/drivers/net/phy/at803x.c
+++ b/drivers/net/phy/at803x.c
@@ -986,6 +986,25 @@ static int at8031_pll_config(struct phy_device *phydev)
 static int at803x_hibernation_mode_config(struct phy_device *phydev)
 {
 	struct at803x_priv *priv = phydev->priv;
+	int ret;
+
+	/* Toggle hibernation mode OFF and ON to wake the PHY up and
+	 * make it generate clock on RX_CLK pin for about 10 seconds.
+	 * These clock are needed during start up by MACs like DWMAC
+	 * in NXP i.MX8M Plus to release their DMA from reset. After
+	 * the MAC has started up, the PHY can enter hibernation and
+	 * disable the RX_CLK clock, this poses no problem for the MAC.
+	 */
+	ret = at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_HIB_CTRL,
+				    AT803X_DEBUG_HIB_CTRL_PS_HIB_EN, 0);
+	if (ret < 0)
+		return ret;
+
+	ret = at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_HIB_CTRL,
+				    AT803X_DEBUG_HIB_CTRL_PS_HIB_EN,
+				    AT803X_DEBUG_HIB_CTRL_PS_HIB_EN);
+	if (ret < 0)
+		return ret;
 
 	/* The default after hardware reset is hibernation mode enabled. After
 	 * software reset, the value is retained.
-- 
2.40.1