lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <933D6861-A193-4145-9533-A7EE8E6DD32F@hpe.com>
Date: Fri, 4 Aug 2023 20:55:58 +0000
From: "Hawkins, Nick" <nick.hawkins@....com>
To: Andrew Lunn <andrew@...n.ch>
CC: "christophe.jaillet@...adoo.fr" <christophe.jaillet@...adoo.fr>,
        "simon.horman@...igine.com" <simon.horman@...igine.com>,
        "Verdun, Jean-Marie"
	<verdun@....com>,
        "davem@...emloft.net" <davem@...emloft.net>,
        "edumazet@...gle.com" <edumazet@...gle.com>,
        "kuba@...nel.org"
	<kuba@...nel.org>,
        "pabeni@...hat.com" <pabeni@...hat.com>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "krzysztof.kozlowski+dt@...aro.org" <krzysztof.kozlowski+dt@...aro.org>,
        "conor+dt@...nel.org" <conor+dt@...nel.org>,
        "netdev@...r.kernel.org"
	<netdev@...r.kernel.org>,
        "devicetree@...r.kernel.org"
	<devicetree@...r.kernel.org>,
        "linux-kernel@...r.kernel.org"
	<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 4/5] net: hpe: Add GXP UMAC Driver

Greetings Andrew,

For some reason I do not see your replies for v1 of this patch or
the mdio driver on lore.kernel. Apologies as I did not intend to
not address your previous review comments. My mistake.

>> +static int umac_int_phy_init(struct umac_priv *umac)
>> +{
>> + struct phy_device *phy_dev = umac->int_phy_dev;
>> + unsigned int value;
>> +
>> + value = phy_read(phy_dev, 0);
>> + if (value & 0x4000)
>> + pr_info("Internal PHY loopback is enabled - clearing\n");

> How is the PHY getting into loopback mode? The MAC driver should never
> touch the PHY, because you have no idea what the PHY actually is,
> unless it is internal. 

It would only be in loopback mode if it was previously configured
that way. I will remove it. The PHY is internal to the ASIC 
and is always the same. Given that information is it acceptable
to configure it here? If not where would be more appropriate?

To help picture the network hardware layout I have uploaded
an image to the hpe github wiki.
https://github.com/HewlettPackard/gxp-linux/wiki/Information-about-the-BMC

. . .

>> +static int umac_phy_fixup(struct phy_device *phy_dev)
>> +{
>> + unsigned int value;
>> +
>> + /* set phy mode to SGMII to copper */
>> + /* set page to 18 by writing 18 to register 22 */
>> + phy_write(phy_dev, PHY_88E1514_PAGE_ADDRESS, 18);
>> + value = phy_read(phy_dev, PHY_88E1514_GENERAL_CONTROL_REG1);
>> + value &= ~0x07;
>> + value |= 0x01;
>> + phy_write(phy_dev, PHY_88E1514_GENERAL_CONTROL_REG1, value);

> The PHY driver should do this, not the MAC. When you connect the MAC
> to the PHY, set the correct interface mode.

Is there a particular function I should be using to achieve this when I
connect to the PHY?

Thanks,

-Nick Hawkins

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ