netdev - Re: [PATCH v2 13/28] soc: fsl: cpm1: qmc: Add support for disabling channel TSA entries

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Date: Tue, 8 Aug 2023 08:06:44 +0000
From: Christophe Leroy <christophe.leroy@...roup.eu>
To: Herve Codina <herve.codina@...tlin.com>, "David S. Miller"
	<davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>, Jakub Kicinski
	<kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>, Andrew Lunn
	<andrew@...n.ch>, Rob Herring <robh+dt@...nel.org>, Krzysztof Kozlowski
	<krzysztof.kozlowski+dt@...aro.org>, Conor Dooley <conor+dt@...nel.org>, Lee
 Jones <lee@...nel.org>, Linus Walleij <linus.walleij@...aro.org>, Qiang Zhao
	<qiang.zhao@....com>, Li Yang <leoyang.li@....com>, Liam Girdwood
	<lgirdwood@...il.com>, Mark Brown <broonie@...nel.org>, Jaroslav Kysela
	<perex@...ex.cz>, Takashi Iwai <tiwai@...e.com>, Shengjiu Wang
	<shengjiu.wang@...il.com>, Xiubo Li <Xiubo.Lee@...il.com>, Fabio Estevam
	<festevam@...il.com>, Nicolin Chen <nicoleotsuka@...il.com>, Randy Dunlap
	<rdunlap@...radead.org>
CC: "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
	"linuxppc-dev@...ts.ozlabs.org" <linuxppc-dev@...ts.ozlabs.org>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org"
	<linux-arm-kernel@...ts.infradead.org>, "alsa-devel@...a-project.org"
	<alsa-devel@...a-project.org>, Thomas Petazzoni
	<thomas.petazzoni@...tlin.com>
Subject: Re: [PATCH v2 13/28] soc: fsl: cpm1: qmc: Add support for disabling
 channel TSA entries



Le 26/07/2023 à 17:02, Herve Codina a écrit :
> In order to allow runtime timeslot route changes, disabling channel TSA
> entries needs to be supported.
> 
> Add support for this new feature.
> 
> Signed-off-by: Herve Codina <herve.codina@...tlin.com>

Reviewed-by: Christophe Leroy <christophe.leroy@...roup.eu>

> ---
>   drivers/soc/fsl/qe/qmc.c | 20 +++++++++++---------
>   1 file changed, 11 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/soc/fsl/qe/qmc.c b/drivers/soc/fsl/qe/qmc.c
> index 82405915f2a4..146eebc12737 100644
> --- a/drivers/soc/fsl/qe/qmc.c
> +++ b/drivers/soc/fsl/qe/qmc.c
> @@ -567,7 +567,8 @@ static void qmc_chan_read_done(struct qmc_chan *chan)
>   	spin_unlock_irqrestore(&chan->rx_lock, flags);
>   }
>   
> -static int qmc_chan_setup_tsa_64rxtx(struct qmc_chan *chan, const struct tsa_serial_info *info)
> +static int qmc_chan_setup_tsa_64rxtx(struct qmc_chan *chan, const struct tsa_serial_info *info,
> +				     bool enable)
>   {
>   	unsigned int i;
>   	u16 curr;
> @@ -603,13 +604,14 @@ static int qmc_chan_setup_tsa_64rxtx(struct qmc_chan *chan, const struct tsa_ser
>   			continue;
>   
>   		qmc_clrsetbits16(chan->qmc->scc_pram + QMC_GBL_TSATRX + (i * 2),
> -				 ~QMC_TSA_WRAP, val);
> +				 ~QMC_TSA_WRAP, enable ? val : 0x0000);
>   	}
>   
>   	return 0;
>   }
>   
> -static int qmc_chan_setup_tsa_32rx_32tx(struct qmc_chan *chan, const struct tsa_serial_info *info)
> +static int qmc_chan_setup_tsa_32rx_32tx(struct qmc_chan *chan, const struct tsa_serial_info *info,
> +					bool enable)
>   {
>   	unsigned int i;
>   	u16 curr;
> @@ -650,7 +652,7 @@ static int qmc_chan_setup_tsa_32rx_32tx(struct qmc_chan *chan, const struct tsa_
>   			continue;
>   
>   		qmc_clrsetbits16(chan->qmc->scc_pram + QMC_GBL_TSATRX + (i * 2),
> -				 ~QMC_TSA_WRAP, val);
> +				 ~QMC_TSA_WRAP, enable ? val : 0x0000);
>   	}
>   	/* Set entries based on Tx stuff */
>   	for (i = 0; i < info->nb_tx_ts; i++) {
> @@ -658,13 +660,13 @@ static int qmc_chan_setup_tsa_32rx_32tx(struct qmc_chan *chan, const struct tsa_
>   			continue;
>   
>   		qmc_clrsetbits16(chan->qmc->scc_pram + QMC_GBL_TSATTX + (i * 2),
> -				 ~QMC_TSA_WRAP, val);
> +				 ~QMC_TSA_WRAP, enable ? val : 0x0000);
>   	}
>   
>   	return 0;
>   }
>   
> -static int qmc_chan_setup_tsa(struct qmc_chan *chan)
> +static int qmc_chan_setup_tsa(struct qmc_chan *chan, bool enable)
>   {
>   	struct tsa_serial_info info;
>   	int ret;
> @@ -679,8 +681,8 @@ static int qmc_chan_setup_tsa(struct qmc_chan *chan)
>   	 * and one for Tx) according to assigned TS numbers.
>   	 */
>   	return ((info.nb_tx_ts > 32) || (info.nb_rx_ts > 32)) ?
> -		qmc_chan_setup_tsa_64rxtx(chan, &info) :
> -		qmc_chan_setup_tsa_32rx_32tx(chan, &info);
> +		qmc_chan_setup_tsa_64rxtx(chan, &info, enable) :
> +		qmc_chan_setup_tsa_32rx_32tx(chan, &info, enable);
>   }
>   
>   static int qmc_chan_command(struct qmc_chan *chan, u8 qmc_opcode)
> @@ -1146,7 +1148,7 @@ static int qmc_setup_chan(struct qmc *qmc, struct qmc_chan *chan)
>   
>   	chan->qmc = qmc;
>   
> -	ret = qmc_chan_setup_tsa(chan);
> +	ret = qmc_chan_setup_tsa(chan, true);
>   	if (ret)
>   		return ret;
>