lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date: Tue, 8 Aug 2023 06:03:47 -0500
From: Dinh Nguyen <dinguyen@...nel.org>
To: niravkumar.l.rabara@...el.com
Cc: adrian.ho.yin.ng@...el.com, andrew@...n.ch, conor+dt@...nel.org,
 devicetree@...r.kernel.org, krzysztof.kozlowski+dt@...aro.org,
 linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
 mturquette@...libre.com, netdev@...r.kernel.org, p.zabel@...gutronix.de,
 richardcochran@...il.com, robh+dt@...nel.org, sboyd@...nel.org,
 wen.ping.teh@...el.com
Subject: Re: [PATCH v2 4/5] clk: socfpga: agilex: add clock driver for the
 Agilex5

Hi Stephen/Mike,

On 7/31/23 20:02, niravkumar.l.rabara@...el.com wrote:
> From: Niravkumar L Rabara <niravkumar.l.rabara@...el.com>
> 
> Add support for Intel's SoCFPGA Agilex5 platform. The clock manager
> driver for the Agilex5 is very similar to the Agilex platform,we can
> re-use most of the Agilex clock driver.
> 
> Signed-off-by: Teh Wen Ping <wen.ping.teh@...el.com>
> Reviewed-by: Dinh Nguyen <dinguyen@...nel.org>
> Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@...el.com>
> ---
>   drivers/clk/socfpga/clk-agilex.c | 433 ++++++++++++++++++++++++++++++-
>   1 file changed, 431 insertions(+), 2 deletions(-)
> 

If you're ok with this patch, can I take this through armsoc?

Dinh

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ