netdev - Re: [PATCH] net: phy: Don't disable irqs on shutdown if WoL is enabled

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Message-ID: <20230809154418.hjkf43ndwfzretiy@LXL00007.wbi.nxp.com>
Date: Wed, 9 Aug 2023 18:44:18 +0300
From: Ioana Ciornei <ioana.ciornei@....com>
To: "Russell King (Oracle)" <linux@...linux.org.uk>
Cc: Florian Fainelli <f.fainelli@...il.com>,
	Jakub Kicinski <kuba@...nel.org>, Andrew Lunn <andrew@...n.ch>,
	Heiner Kallweit <hkallweit1@...il.com>,
	Uwe Kleine-K├Ânig <u.kleine-koenig@...gutronix.de>,
	Ioana Ciornei <ciorneiioana@...il.com>, netdev@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	Alexandru Ardelean <alexandru.ardelean@...log.com>,
	Andre Edich <andre.edich@...rochip.com>,
	Antoine Tenart <atenart@...nel.org>,
	Baruch Siach <baruch@...s.co.il>,
	Christophe Leroy <christophe.leroy@....fr>,
	Divya Koppera <Divya.Koppera@...rochip.com>,
	Hauke Mehrtens <hauke@...ke-m.de>,
	Jerome Brunet <jbrunet@...libre.com>,
	Kavya Sree Kotagiri <kavyasree.kotagiri@...rochip.com>,
	Linus Walleij <linus.walleij@...aro.org>,
	Marco Felsch <m.felsch@...gutronix.de>, Marek Vasut <marex@...x.de>,
	Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
	Mathias Kresin <dev@...sin.me>, Maxim Kochetkov <fido_max@...ox.ru>,
	Michael Walle <michael@...le.cc>,
	Neil Armstrong <narmstrong@...libre.com>,
	Nisar Sayed <Nisar.Sayed@...rochip.com>,
	Oleksij Rempel <o.rempel@...gutronix.de>,
	Philippe Schenker <philippe.schenker@...adex.com>,
	Willy Liu <willy.liu@...ltek.com>,
	Yuiko Oshino <yuiko.oshino@...rochip.com>
Subject: Re: [PATCH] net: phy: Don't disable irqs on shutdown if WoL is
 enabled

On Wed, Aug 09, 2023 at 03:29:17PM +0100, Russell King (Oracle) wrote:
> On Wed, Aug 09, 2023 at 05:21:55PM +0300, Ioana Ciornei wrote:
> > That's a perfect summary of the problem that I was trying to fix.
> > 
> > The board in question is a LS1021ATSN which has two AR8031 PHYs that
> > share an interrupt line. In case only one of the PHYs is probed and
> > there are pending interrupts on the PHY#2 an IRQ storm will happen
> > since there is no entity to clear the interrupt from PHY#2's registers.
> > PHY#1's driver will get stuck in .handle_interrupt() indefinitely.
> 
> So I have two further questions:
> 1. Is WoL able to be supported on this hardware?

I don't know if anyone cares about WoL on the AR8031 PHYs from this
board.

Both of the PHYs are used in conjuction with 2 eTSEC controllers - which
use the driver in drivers/net/ethernet/freescale/gianfar.c.

The Ethernet controller does have WoL support, which means that WoL could
still be supported on the board even though we would forbid WoL on the
AR8031 PHYs.

> 2. AR8031 has a seperate WOL_INT signal that can be used to wake up the
>    system. Is this used in the hardware design?

No, WOL_INT is not connected.