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Message-ID: <ZNSG9GwGhND0YsBr@nanopsycho>
Date: Thu, 10 Aug 2023 08:43:00 +0200
From: Jiri Pirko <jiri@...nulli.us>
To: Vadim Fedorenko <vadim.fedorenko@...ux.dev>
Cc: Jakub Kicinski <kuba@...nel.org>,
	Arkadiusz Kubalewski <arkadiusz.kubalewski@...el.com>,
	Jonathan Lemon <jonathan.lemon@...il.com>,
	Paolo Abeni <pabeni@...hat.com>,
	Milena Olech <milena.olech@...el.com>,
	Michal Michalik <michal.michalik@...el.com>,
	linux-arm-kernel@...ts.infradead.org, poros@...hat.com,
	mschmidt@...hat.com, netdev@...r.kernel.org,
	linux-clk@...r.kernel.org, Bart Van Assche <bvanassche@....org>,
	intel-wired-lan@...ts.osuosl.org
Subject: Re: [PATCH net-next v3 7/9] ice: implement dpll interface to control
 cgu

Wed, Aug 09, 2023 at 11:40:25PM CEST, vadim.fedorenko@...ux.dev wrote:
>From: Arkadiusz Kubalewski <arkadiusz.kubalewski@...el.com>

[...]


>+/**
>+ * ice_dpll_deinit - Disable the driver/HW support for dpll subsystem
>+ * the dpll device.
>+ * @pf: board private structure
>+ *
>+ * Handles the cleanup work required after dpll initialization, freeing
>+ * resources and unregistering the dpll, pin and all resources used for
>+ * handling them.
>+ *
>+ * Context: Destroys pf->dplls.lock mutex.
>+ */
>+void ice_dpll_deinit(struct ice_pf *pf)
>+{
>+	bool cgu = ice_is_feature_supported(pf, ICE_F_CGU);
>+
>+	if (!test_bit(ICE_FLAG_DPLL, pf->flags))
>+		return;
>+	if (cgu)
>+		ice_dpll_deinit_worker(pf);
>+	clear_bit(ICE_FLAG_DPLL, pf->flags);

Clearing the flag after deinit worker somehow implicates that it needs
to be set until here. That is not true.

Please rather use test_and_clear_bit() instead of test_bit() which would
takes care of the clear alongside with the check.

With or without that.

Signed-off-by: Jiri Pirko <jiri@...dia.com>

[...]

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