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Date: Tue, 15 Aug 2023 08:15:07 -0700
From: Vadim Fedorenko <vadfed@...a.com>
To: Rahul Rameshbabu <rrameshbabu@...dia.com>, Gal Pressman <gal@...dia.com>,
        Bar Shapira <bshapira@...dia.com>
CC: Vadim Fedorenko <vadim.fedorenko@...ux.dev>,
        Saeed Mahameed
	<saeedm@...dia.com>, Jakub Kicinski <kuba@...nel.org>,
        Richard Cochran
	<richardcochran@...il.com>, <netdev@...r.kernel.org>
Subject: [PATCH net] Revert "net/mlx5: Update cyclecounter shift value to improve ptp free running mode precision"

From: Vadim Fedorenko <vadim.fedorenko@...ux.dev>

This reverts commit 6a40109275626267ebf413ceda81c64719b5c431.

There was an assumption in the original commit that all the devices
supported by mlx5 advertise 1GHz as an internal timer frequency.
Apparently at least ConnectX-4 Lx (MCX4431N-GCAN) provides 156.250Mhz
as an internal frequency and the original commit breaks PTP
synchronization on these cards.

Signed-off-by: Vadim Fedorenko <vadim.fedorenko@...ux.dev>
---
 drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c b/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c
index 377372f0578a..3e504e7d24ce 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c
@@ -39,7 +39,7 @@
 #include "clock.h"
 
 enum {
-	MLX5_CYCLES_SHIFT	= 31
+	MLX5_CYCLES_SHIFT	= 23
 };
 
 enum {
-- 
2.39.3


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