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Message-ID: <CAH-L+nNj8KSMGiOmuJNBV1i_yNzaGrQ1gv6QBnH=KU1ei-jakQ@mail.gmail.com>
Date: Tue, 22 Aug 2023 13:28:03 +0530
From: Kalesh Anakkur Purayil <kalesh-anakkur.purayil@...adcom.com>
To: Tony Nguyen <anthony.l.nguyen@...el.com>
Cc: davem@...emloft.net, kuba@...nel.org, pabeni@...hat.com,
edumazet@...gle.com, netdev@...r.kernel.org,
Sasha Neftin <sasha.neftin@...el.com>, Naama Meir <naamax.meir@...ux.intel.com>
Subject: Re: [PATCH net] igc: Fix the typo in the PTM Control macro
On Mon, Aug 21, 2023 at 10:55 PM Tony Nguyen <anthony.l.nguyen@...el.com>
wrote:
> From: Sasha Neftin <sasha.neftin@...el.com>
>
> The IGC_PTM_CTRL_SHRT_CYC defines the time between two consecutive PTM
> requests. The bit resolution of this field is six bits. That bit five was
> missing in the mask. This patch comes to correct the typo in the
> IGC_PTM_CTRL_SHRT_CYC macro.
>
> Fixes: a90ec8483732 ("igc: Add support for PTP getcrosststamp()")
> Signed-off-by: Sasha Neftin <sasha.neftin@...el.com>
> Tested-by: Naama Meir <naamax.meir@...ux.intel.com>
> Signed-off-by: Tony Nguyen <anthony.l.nguyen@...el.com>
>
Reviewed-by: Kalesh AP <kalesh-anakkur.purayil@...adcom.com>
> ---
> drivers/net/ethernet/intel/igc/igc_defines.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/net/ethernet/intel/igc/igc_defines.h
> b/drivers/net/ethernet/intel/igc/igc_defines.h
> index 44a507029946..2f780cc90883 100644
> --- a/drivers/net/ethernet/intel/igc/igc_defines.h
> +++ b/drivers/net/ethernet/intel/igc/igc_defines.h
> @@ -546,7 +546,7 @@
> #define IGC_PTM_CTRL_START_NOW BIT(29) /* Start PTM Now */
> #define IGC_PTM_CTRL_EN BIT(30) /* Enable PTM */
> #define IGC_PTM_CTRL_TRIG BIT(31) /* PTM Cycle trigger */
> -#define IGC_PTM_CTRL_SHRT_CYC(usec) (((usec) & 0x2f) << 2)
> +#define IGC_PTM_CTRL_SHRT_CYC(usec) (((usec) & 0x3f) << 2)
> #define IGC_PTM_CTRL_PTM_TO(usec) (((usec) & 0xff) << 8)
>
> #define IGC_PTM_SHORT_CYC_DEFAULT 10 /* Default Short/interrupted
> cycle interval */
> --
> 2.38.1
>
>
>
--
Regards,
Kalesh A P
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