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Message-ID: <87ttspk41s.fsf@all.your.base.are.belong.to.us>
Date: Wed, 23 Aug 2023 20:27:11 +0200
From: Björn Töpel <bjorn@...nel.org>
To: Pu Lehui <pulehui@...weicloud.com>, linux-riscv@...ts.infradead.org,
 bpf@...r.kernel.org, netdev@...r.kernel.org, linux-kernel@...r.kernel.org
Cc: Yonghong Song <yhs@...com>, Alexei Starovoitov <ast@...nel.org>, Daniel
 Borkmann <daniel@...earbox.net>, Andrii Nakryiko <andrii@...nel.org>,
 Martin KaFai Lau <martin.lau@...ux.dev>, Song Liu <song@...nel.org>, John
 Fastabend <john.fastabend@...il.com>, KP Singh <kpsingh@...nel.org>,
 Stanislav Fomichev <sdf@...gle.com>, Hao Luo <haoluo@...gle.com>, Jiri
 Olsa <jolsa@...nel.org>, Palmer Dabbelt <palmer@...belt.com>, Xu Kuohai
 <xukuohai@...wei.com>, Puranjay Mohan <puranjay12@...il.com>, Pu Lehui
 <pulehui@...wei.com>, Pu Lehui <pulehui@...weicloud.com>
Subject: Re: [PATCH bpf-next 3/7] riscv, bpf: Support sign-extension mov insns

Björn Töpel <bjorn@...nel.org> writes:

> Pu Lehui <pulehui@...weicloud.com> writes:
>
>> From: Pu Lehui <pulehui@...wei.com>
>>
>> Add support sign-extension mov instructions for RV64.
>>
>> Signed-off-by: Pu Lehui <pulehui@...wei.com>
>> ---
>>  arch/riscv/net/bpf_jit_comp64.c | 14 +++++++++++++-
>>  1 file changed, 13 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/riscv/net/bpf_jit_comp64.c b/arch/riscv/net/bpf_jit_comp64.c
>> index fd36cb17101a..d1497182cacf 100644
>> --- a/arch/riscv/net/bpf_jit_comp64.c
>> +++ b/arch/riscv/net/bpf_jit_comp64.c
>> @@ -1047,7 +1047,19 @@ int bpf_jit_emit_insn(const struct bpf_insn *insn, struct rv_jit_context *ctx,
>>  			emit_zext_32(rd, ctx);
>>  			break;
>>  		}
>> -		emit_mv(rd, rs, ctx);
>> +		switch (insn->off) {
>> +		case 0:
>> +			emit_mv(rd, rs, ctx);
>> +			break;
>> +		case 8:
>> +		case 16:
>> +			emit_slli(rs, rs, 64 - insn->off, ctx);
>> +			emit_srai(rd, rs, 64 - insn->off, ctx);
>
> You're clobbering the source register (rs) here, which is correct.

Too quick! s/correct/incorrect/! :-)


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