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Message-ID: <20230827153523.GS3523530@kernel.org>
Date: Sun, 27 Aug 2023 17:35:23 +0200
From: Simon Horman <horms@...nel.org>
To: Daniel Golle <daniel@...rotopia.org>
Cc: Felix Fietkau <nbd@....name>, John Crispin <john@...ozen.org>,
Sean Wang <sean.wang@...iatek.com>,
Mark Lee <Mark-MC.Lee@...iatek.com>,
Lorenzo Bianconi <lorenzo@...nel.org>,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
Matthias Brugger <matthias.bgg@...il.com>,
AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>,
Russell King <linux@...linux.org.uk>, linux-kernel@...r.kernel.org,
netdev@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org
Subject: Re: [PATCH RFC net-next v2] net: ethernet: mtk_eth_soc: add paths
and SerDes modes for MT7988
On Thu, Aug 24, 2023 at 09:24:48PM +0100, Daniel Golle wrote:
> MT7988 comes with a built-in 2.5G PHY as well as SerDes lanes to
> connect external PHYs or transceivers in USXGMII, 10GBase-R, 5GBase-R,
> 2500Base-X, 1000Base-X and Cisco SGMII interface modes.
>
> Implement support for configuring for the new paths to SerDes interfaces
> and the internal 2.5G PHY.
>
> Add USXGMII PCS driver for 10GBase-R, 5GBase-R and USXGMII mode, and
> setup the new PHYA on MT7988 to access the also still existing old
> LynxI PCS for 1000Base-X, 2500Base-X and Cisco SGMII PCS interface
> modes.
>
> Signed-off-by: Daniel Golle <daniel@...rotopia.org>
Hi Daniel,
some minor feedback from my side.
...
> diff --git a/drivers/net/ethernet/mediatek/mtk_usxgmii.c b/drivers/net/ethernet/mediatek/mtk_usxgmii.c
...
> +static int mtk_usxgmii_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode,
> + phy_interface_t interface,
> + const unsigned long *advertising,
> + bool permit_pause_to_mac)
> +{
> + struct mtk_usxgmii_pcs *mpcs = pcs_to_mtk_usxgmii_pcs(pcs);
> + struct mtk_eth *eth = mpcs->eth;
> + struct regmap *pextp = eth->regmap_pextp[mpcs->id];
> + unsigned int an_ctrl = 0, link_timer = 0, xfi_mode = 0, adapt_mode = 0;
> + bool mode_changed = false;
> +
> + if (!pextp)
> + return -ENODEV;
> +
> + if (interface == PHY_INTERFACE_MODE_USXGMII) {
> + an_ctrl = FIELD_PREP(USXGMII_AN_SYNC_CNT, 0x1FF) |
> + (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) ?
> + USXGMII_AN_ENABLE : 0;
clang-16 W=1 suggests using parentheses here:
drivers/net/ethernet/mediatek/mtk_usxgmii.c:468:51: warning: operator '?:' has lower precedence than '|'; '|' will be evaluated first [-Wbitwise-conditional-parentheses]
(neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) ?
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ^
drivers/net/ethernet/mediatek/mtk_usxgmii.c:468:51: note: place parentheses around the '|' expression to silence this warning
(neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) ?
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ^
drivers/net/ethernet/mediatek/mtk_usxgmii.c:468:51: note: place parentheses around the '?:' expression to evaluate it first
(neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) ?
^
(
> + link_timer = FIELD_PREP(USXGMII_LINK_TIMER_IDLE_DETECT, 0x7B) |
> + FIELD_PREP(USXGMII_LINK_TIMER_COMP_ACK_DETECT, 0x7B) |
> + FIELD_PREP(USXGMII_LINK_TIMER_AN_RESTART, 0x7B);
> + xfi_mode = FIELD_PREP(USXGMII_XFI_RX_MODE, USXGMII_XFI_RX_MODE_10G) |
> + FIELD_PREP(USXGMII_XFI_TX_MODE, USXGMII_XFI_TX_MODE_10G);
...
> +int mtk_usxgmii_init(struct mtk_eth *eth)
> +{
> + struct device_node *r = eth->dev->of_node;
> + struct device *dev = eth->dev;
> + struct device_node *np;
> + int i, ret;
> +
> + for (i = 0; i < MTK_MAX_DEVS; i++) {
> + np = of_parse_phandle(r, "mediatek,usxgmiisys", i);
> + if (!np)
> + break;
> +
> + eth->usxgmii_pcs[i] = devm_kzalloc(dev, sizeof(*eth->usxgmii_pcs), GFP_KERNEL);
Smatch warns that only 8 bytes are allocated, whereas 64 are needed.
I think one more defference of the parameter to sizeof().
e.g.:
eth->usxgmii_pcs[i] = devm_kzalloc(dev,
sizeof(*eth->usxgmii_pcs[i]),
GFP_KERNEL);
> + if (!eth->usxgmii_pcs[i])
> + return -ENOMEM;
> +
> + eth->usxgmii_pcs[i]->id = i;
> + eth->usxgmii_pcs[i]->eth = eth;
> + eth->usxgmii_pcs[i]->regmap = syscon_node_to_regmap(np);
> + if (IS_ERR(eth->usxgmii_pcs[i]->regmap))
> + return PTR_ERR(eth->usxgmii_pcs[i]->regmap);
> +
> + eth->usxgmii_pcs[i]->pcs.ops = &mtk_usxgmii_pcs_ops;
> + eth->usxgmii_pcs[i]->pcs.poll = true;
> + eth->usxgmii_pcs[i]->pcs.neg_mode = true;
> + eth->usxgmii_pcs[i]->interface = PHY_INTERFACE_MODE_NA;
> + eth->usxgmii_pcs[i]->neg_mode = -1;
> +
> + of_node_put(np);
> + }
...
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