netdev - Re: [RFC PATCH net-next 1/6] net: ethernet: implement OPEN Alliance control transaction interface

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Date: Sat, 9 Sep 2023 15:33:40 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Parthiban Veerasooran <Parthiban.Veerasooran@...rochip.com>
Cc: davem@...emloft.net, edumazet@...gle.com, kuba@...nel.org,
	pabeni@...hat.com, robh+dt@...nel.org,
	krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
	corbet@....net, steen.hegelund@...rochip.com, rdunlap@...radead.org,
	horms@...nel.org, casper.casan@...il.com, netdev@...r.kernel.org,
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
	linux-doc@...r.kernel.org, horatiu.vultur@...rochip.com,
	Woojung.Huh@...rochip.com, Nicolas.Ferre@...rochip.com,
	UNGLinuxDriver@...rochip.com, Thorsten.Kummermehr@...rochip.com
Subject: Re: [RFC PATCH net-next 1/6] net: ethernet: implement OPEN Alliance
 control transaction interface

On Fri, Sep 08, 2023 at 07:59:14PM +0530, Parthiban Veerasooran wrote:
> Implement register read/write interface according to the control
> communication specified in the OPEN Alliance 10BASE-T1x MACPHY Serial
> Interface document. Control transactions consist of one or more control
> commands. Control commands are used by the SPI host to read and write
> registers within the MAC-PHY. Each control commands are composed of a
> 32-bit control command header followed by register data.
> 
> Control write commands can write either a single register or multiple
> consecutive registers. When multiple consecutive registers are written,
> the address is automatically post-incremented by the MAC-PHY. The write
> command and data is also echoed from the MAC-PHY back to the SPI host to
> enable the SPI host to identify which register write failed in the case
> of any bus errors.
> 
> Control read commands can read either a single register or multiple
> consecutive registers. When multiple consecutive registers are read, the
> address is automatically post-incremented by the MAC-PHY.
> 
> The register data being read or written can be protected against simple
> bit errors. When enabled by setting the Protection Enable (PROTE) bit in
> the CONFIG0 register, protection is accomplished by duplication of each
> 32-bit word containing register data with its ones’ complement. Errors
> are detected at the receiver by performing a simple exclusive-OR (XOR) of
> each received 32-bit word containing register data with its received
> complement and detecting if there are any zeros in the result.
> 
> Signed-off-by: Parthiban Veerasooran <Parthiban.Veerasooran@...rochip.com>
> ---
>  Documentation/networking/oa-tc6-framework.rst | 231 ++++++++++++++++++
>  MAINTAINERS                                   |   8 +
>  drivers/net/ethernet/oa_tc6.c                 | 222 +++++++++++++++++
>  include/linux/oa_tc6.h                        |  31 +++

I'm surprised there is no kconfig and Makefile changes here. I would
expect this is compiled as a module, which the vendor code can then
make use of. 

     Andrew