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Message-Id: <20230916110902.234273-5-arinc.unal@arinc9.com>
Date: Sat, 16 Sep 2023 14:08:56 +0300
From: Arınç ÜNAL <arinc.unal@...nc9.com>
To: "David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
George McCollister <george.mccollister@...il.com>,
Andrew Lunn <andrew@...n.ch>,
Florian Fainelli <f.fainelli@...il.com>,
Vladimir Oltean <olteanv@...il.com>,
Kurt Kanzenbach <kurt@...utronix.de>,
Matthias Brugger <matthias.bgg@...il.com>,
AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>,
Woojung Huh <woojung.huh@...rochip.com>,
UNGLinuxDriver@...rochip.com,
Linus Walleij <linus.walleij@...aro.org>,
Alvin Šipraga <alsi@...g-olufsen.dk>,
Clément Léger <clement.leger@...tlin.com>,
Marcin Wojtas <mw@...ihalf.com>,
"Russell King (Oracle)" <linux@...linux.org.uk>,
Lars Povlsen <lars.povlsen@...rochip.com>,
Steen Hegelund <Steen.Hegelund@...rochip.com>,
Daniel Machon <daniel.machon@...rochip.com>,
Radhey Shyam Pandey <radhey.shyam.pandey@....com>,
Arınç ÜNAL <arinc.unal@...nc9.com>,
Daniel Golle <daniel@...rotopia.org>,
Landen Chao <Landen.Chao@...iatek.com>,
DENG Qingfang <dqfext@...il.com>,
Sean Wang <sean.wang@...iatek.com>,
Geert Uytterhoeven <geert+renesas@...der.be>,
Magnus Damm <magnus.damm@...il.com>,
Maxime Chevallier <maxime.chevallier@...tlin.com>,
Nicolas Ferre <nicolas.ferre@...rochip.com>,
Claudiu Beznea <claudiu.beznea@...rochip.com>,
Marek Vasut <marex@...x.de>,
Claudiu Manoil <claudiu.manoil@....com>,
Alexandre Belloni <alexandre.belloni@...tlin.com>,
John Crispin <john@...ozen.org>,
Madalin Bucur <madalin.bucur@....com>,
Ioana Ciornei <ioana.ciornei@....com>,
Lorenzo Bianconi <lorenzo@...nel.org>,
Felix Fietkau <nbd@....name>,
Horatiu Vultur <horatiu.vultur@...rochip.com>,
Oleksij Rempel <linux@...pel-privat.de>,
Alexandre Torgue <alexandre.torgue@...s.st.com>,
Giuseppe Cavallaro <peppe.cavallaro@...com>,
Jose Abreu <joabreu@...opsys.com>,
Grygorii Strashko <grygorii.strashko@...com>,
Sekhar Nori <nsekhar@...com>,
Shyam Pandey <radhey.shyam.pandey@...inx.com>
Cc: Woojung Huh <Woojung.Huh@...rochip.com>,
Steen Hegelund <steen.hegelund@...rochip.com>,
mithat.guner@...ont.com,
erkin.bozoglu@...ont.com,
netdev@...r.kernel.org,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org,
linux-renesas-soc@...r.kernel.org
Subject: [PATCH net-next v2 04/10] dt-bindings: net: dsa: nxp,sja1105: improve MDIO bus bindings
The SJA1110 switch uses the mdios property for its two MDIO buses. Instead
of a pattern, define two mdio nodes. This ensures the same compatible
string won't be used twice. The address and size cell definitions can also
be removed now that the reg property has become unnecessary.
Move the comment to the description of mdios, mdio0, and mdio1 properties.
Disallow the mdios property for SJA1105. Require at least one of the MDIO
buses to be defined to prevent empty mdios child node.
Signed-off-by: Arınç ÜNAL <arinc.unal@...nc9.com>
---
.../bindings/net/dsa/nxp,sja1105.yaml | 49 ++++++++++---------
1 file changed, 26 insertions(+), 23 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/dsa/nxp,sja1105.yaml b/Documentation/devicetree/bindings/net/dsa/nxp,sja1105.yaml
index 4d5f5cc6d031..3f3c4ecc6442 100644
--- a/Documentation/devicetree/bindings/net/dsa/nxp,sja1105.yaml
+++ b/Documentation/devicetree/bindings/net/dsa/nxp,sja1105.yaml
@@ -35,42 +35,44 @@ properties:
spi-cpha: true
spi-cpol: true
- # Optional container node for the 2 internal MDIO buses of the SJA1110
- # (one for the internal 100base-T1 PHYs and the other for the single
- # 100base-TX PHY). The "reg" property does not have physical significance.
- # The PHY addresses to port correspondence is as follows: for 100base-T1,
- # port 5 has PHY 1, port 6 has PHY 2 etc, while for 100base-TX, port 1 has
- # PHY 1.
mdios:
+ description:
+ The optional container node for the two MDIO buses of the SJA1110.
type: object
properties:
- '#address-cells':
- const: 1
- '#size-cells':
- const: 0
-
- patternProperties:
- "^mdio@[0-1]$":
+ mdio0:
+ description:
+ The node for the bus controlling the 100base-T1 PHYs of the SJA1110
+ switch. PHY address to port correspondence is port 5 has PHY 1, port 6
+ has PHY 2, etc.
$ref: /schemas/net/mdio.yaml#
unevaluatedProperties: false
properties:
compatible:
- oneOf:
- - enum:
- - nxp,sja1110-base-t1-mdio
- - nxp,sja1110-base-tx-mdio
+ const: nxp,sja1110-base-t1-mdio
+
+ required:
+ - compatible
- reg:
- oneOf:
- - enum:
- - 0
- - 1
+ mdio1:
+ description:
+ The node for the bus controlling the 100base-TX PHY of the SJA1110
+ switch. PHY address to port correspondence is port 1 has PHY 1.
+ $ref: /schemas/net/mdio.yaml#
+ unevaluatedProperties: false
+
+ properties:
+ compatible:
+ const: nxp,sja1110-base-tx-mdio
required:
- compatible
- - reg
+
+ anyOf:
+ - required: [ mdio0 ]
+ - required: [ mdio1 ]
patternProperties:
"^(ethernet-)?ports$":
@@ -124,6 +126,7 @@ allOf:
then:
properties:
spi-cpol: false
+ mdios: false
required:
- spi-cpha
else:
--
2.39.2
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