netdev - Re: [PATCH bpf-next 3/6] riscv, bpf: Simplify sext and zext logics in branch instructions

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Message-ID: <1708aa5b-78d1-486c-99b1-44d35b4c2f5e@huawei.com>
Date: Mon, 18 Sep 2023 08:32:41 +0800
From: Pu Lehui <pulehui@...wei.com>
To: Simon Horman <horms@...nel.org>, Pu Lehui <pulehui@...weicloud.com>
CC: <bpf@...r.kernel.org>, <linux-riscv@...ts.infradead.org>,
	<netdev@...r.kernel.org>, Björn Töpel
	<bjorn@...nel.org>, Alexei Starovoitov <ast@...nel.org>, Daniel Borkmann
	<daniel@...earbox.net>, Andrii Nakryiko <andrii@...nel.org>, Martin KaFai Lau
	<martin.lau@...ux.dev>, Song Liu <song@...nel.org>, Yonghong Song
	<yhs@...com>, John Fastabend <john.fastabend@...il.com>, KP Singh
	<kpsingh@...nel.org>, Stanislav Fomichev <sdf@...gle.com>, Hao Luo
	<haoluo@...gle.com>, Jiri Olsa <jolsa@...nel.org>, Palmer Dabbelt
	<palmer@...belt.com>, Luke Nelson <luke.r.nels@...il.com>
Subject: Re: [PATCH bpf-next 3/6] riscv, bpf: Simplify sext and zext logics in
 branch instructions



On 2023/9/16 22:47, Simon Horman wrote:
> On Wed, Sep 13, 2023 at 11:34:10PM +0800, Pu Lehui wrote:
>> From: Pu Lehui <pulehui@...wei.com>
>>
>> There are many extension helpers in the current branch instructions, and
>> the implementation is a bit complicated. We simplify this logic through
>> two simple extension helpers with alternate register.
>>
>> Signed-off-by: Pu Lehui <pulehui@...wei.com>
>> ---
>>   arch/riscv/net/bpf_jit_comp64.c | 82 +++++++++++++--------------------
>>   1 file changed, 31 insertions(+), 51 deletions(-)
>>
>> diff --git a/arch/riscv/net/bpf_jit_comp64.c b/arch/riscv/net/bpf_jit_comp64.c
>> index 4a649e195..1728ce16d 100644
>> --- a/arch/riscv/net/bpf_jit_comp64.c
>> +++ b/arch/riscv/net/bpf_jit_comp64.c
>> @@ -141,6 +141,19 @@ static bool in_auipc_jalr_range(s64 val)
>>   		val < ((1L << 31) - (1L << 11));
>>   }
>>   
>> +/* Modify rd pointer to alternate reg to avoid corrupting orignal reg */
> 
> Hi Pu Lehui,
> 
> nit: original >
> I suggest running checkpatch --codespell over this series before submitting
> v2.

Thanks Simon, will check this in next.