netdev - Re: mv88e6xxx: Timeout waiting for EEPROM done

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <15320949-6ee3-48f3-b61d-aaa88533d652@lunn.ch>
Date: Tue, 19 Sep 2023 21:44:22 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Fabio Estevam <festevam@...il.com>
Cc: Vladimir Oltean <olteanv@...il.com>, l00g33k@...il.com,
	netdev <netdev@...r.kernel.org>, Jakub Kicinski <kuba@...nel.org>,
	sashal@...nel.org
Subject: Re: mv88e6xxx: Timeout waiting for EEPROM done

On Tue, Sep 19, 2023 at 04:23:01PM -0300, Fabio Estevam wrote:
> Hi Andrew,
> 
> On Fri, Sep 15, 2023 at 3:23 PM Andrew Lunn <andrew@...n.ch> wrote:
> 
> > The problem with this is that the way to read the contests of the
> > EEPROM depend on the switch family.
> >
> > linux/drivers/net/dsa/mv88e6xxx$ grep \.get_eeprom chip.c
> >         .get_eeprom = mv88e6xxx_g2_get_eeprom8,
> >         .get_eeprom = mv88e6xxx_g2_get_eeprom16,
> 
> Indeed, there are two methods for reading the EEPROM.
> 
> > And how do you know the EEPROM does not in fact contain 0xffff?
> 
> The functional spec doc says:
> 
> "If the just read in Command is all one’s, terminate the serial EEPROM
> reading process, go to 8."

So reading 0xffff means we have reached the end of the contents, not
that it actually exists.

> > What i found interesting in the datasheet for the 6352:
> >
> >      The EEInt indicates the processing of the EEPROM contents is
> >      complete and the I/O registers are now available for CPU
> >      access. A CPU can use this interrupt to know it is OK to start
> >      accessing the device’s registers. The EEInt will assert the
> >      device’s INT pin even if not EEPROM is attached unless the EEPROM
> >      changes the contents of the EEIntMast register (Global 1, offset
> >      0x04) or if the Test SW_MODE has been configured (see 8888E6352,
> >      88E6240, 88E6176, and 88E6172 Functional Specification Datasheet,
> >      Part 1 of 3: Overview, Pinout, Applications, Mechanical and
> >      Electrical Specifications for details).  The StatsDone, VTUDone
> >      and ATUDone interrupts de-assert after the Switch Globa
> >
> > So i would expect that EEInt is set when there is no EEPROM.
> >
> > What strapping do you have for SW_MODE? Is the switch actually in
> > standalone mode?
> 
> Pardon my ignorance, but I don't know the answer to these.
> 
> I do have access to the schematics. How can I tell?

Good question. The datasheets i have don't actually say!

I'm assuming there are two pins which can be strapped to give the
value of SW_MODE, and a value of 2 indicates standalone. But i've no
idea which pins they are.

     Andrew