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Message-ID: <69c31962-235f-565f-81e1-32bb25734ef9@intel.com>
Date: Tue, 19 Sep 2023 14:05:51 -0700
From: Tony Nguyen <anthony.l.nguyen@...el.com>
To: Pawel Chmielewski <pawel.chmielewski@...el.com>,
<intel-wired-lan@...ts.osuosl.org>
CC: <netdev@...r.kernel.org>, <andrew@...n.ch>, Paul Greenwalt
<paul.greenwalt@...el.com>
Subject: Re: [Intel-wired-lan] [PATCH iwl-next v4 2/6] ice: Add 200G speed/phy
type use
On 9/15/2023 8:09 AM, Pawel Chmielewski wrote:
> From: Alice Michael <alice.michael@...el.com>
>
> Add the support for 200G phy speeds and the mapping for their
> advertisement in link. Add the new PHY type bits for AQ command, as
> needed for 200G E830 controllers.
Does this need a 200G link speed map like the other speeds [1]?
Somewhat related. If you have a dependency on another series, please
wait until it is applied before sending. If you are looking for comments
only, you can bypass the waiting and send it as RFC.
Thanks,
Tony
[1]
https://lore.kernel.org/intel-wired-lan/20230915145522.586365-3-pawel.chmielewski@intel.com/
> Signed-off-by: Alice Michael <alice.michael@...el.com>
> Co-developed-by: Pawel Chmielewski <pawel.chmielewski@...el.com>
> Signed-off-by: Pawel Chmielewski <pawel.chmielewski@...el.com>
> ---
> drivers/net/ethernet/intel/ice/ice_adminq_cmd.h | 11 ++++++++++-
> drivers/net/ethernet/intel/ice/ice_common.c | 1 +
> drivers/net/ethernet/intel/ice/ice_ethtool.c | 17 +++++++++++++++--
> drivers/net/ethernet/intel/ice/ice_ethtool.h | 8 ++++++++
> 4 files changed, 34 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h
> index 29f7a9852aec..c38e189ea8f7 100644
> --- a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h
> +++ b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h
> @@ -1099,7 +1099,15 @@ struct ice_aqc_get_phy_caps {
> #define ICE_PHY_TYPE_HIGH_100G_CAUI2 BIT_ULL(2)
> #define ICE_PHY_TYPE_HIGH_100G_AUI2_AOC_ACC BIT_ULL(3)
> #define ICE_PHY_TYPE_HIGH_100G_AUI2 BIT_ULL(4)
> -#define ICE_PHY_TYPE_HIGH_MAX_INDEX 4
> +#define ICE_PHY_TYPE_HIGH_200G_CR4_PAM4 BIT_ULL(5)
> +#define ICE_PHY_TYPE_HIGH_200G_SR4 BIT_ULL(6)
> +#define ICE_PHY_TYPE_HIGH_200G_FR4 BIT_ULL(7)
> +#define ICE_PHY_TYPE_HIGH_200G_LR4 BIT_ULL(8)
> +#define ICE_PHY_TYPE_HIGH_200G_DR4 BIT_ULL(9)
> +#define ICE_PHY_TYPE_HIGH_200G_KR4_PAM4 BIT_ULL(10)
> +#define ICE_PHY_TYPE_HIGH_200G_AUI4_AOC_ACC BIT_ULL(11)
> +#define ICE_PHY_TYPE_HIGH_200G_AUI4 BIT_ULL(12)
> +#define ICE_PHY_TYPE_HIGH_MAX_INDEX 12
>
> struct ice_aqc_get_phy_caps_data {
> __le64 phy_type_low; /* Use values from ICE_PHY_TYPE_LOW_* */
> @@ -1319,6 +1327,7 @@ struct ice_aqc_get_link_status_data {
> #define ICE_AQ_LINK_SPEED_40GB BIT(8)
> #define ICE_AQ_LINK_SPEED_50GB BIT(9)
> #define ICE_AQ_LINK_SPEED_100GB BIT(10)
> +#define ICE_AQ_LINK_SPEED_200GB BIT(11)
> #define ICE_AQ_LINK_SPEED_UNKNOWN BIT(15)
> __le32 reserved3; /* Aligns next field to 8-byte boundary */
> __le64 phy_type_low; /* Use values from ICE_PHY_TYPE_LOW_* */
> diff --git a/drivers/net/ethernet/intel/ice/ice_common.c b/drivers/net/ethernet/intel/ice/ice_common.c
> index 983332cbace2..e8225b275f70 100644
> --- a/drivers/net/ethernet/intel/ice/ice_common.c
> +++ b/drivers/net/ethernet/intel/ice/ice_common.c
> @@ -5666,6 +5666,7 @@ static const u32 ice_aq_to_link_speed[] = {
> SPEED_40000,
> SPEED_50000,
> SPEED_100000, /* BIT(10) */
> + SPEED_200000,
> };
>
> /**
> diff --git a/drivers/net/ethernet/intel/ice/ice_ethtool.c b/drivers/net/ethernet/intel/ice/ice_ethtool.c
> index d7e7e1ba2234..68690e89b4e7 100644
> --- a/drivers/net/ethernet/intel/ice/ice_ethtool.c
> +++ b/drivers/net/ethernet/intel/ice/ice_ethtool.c
> @@ -1718,6 +1718,15 @@ ice_get_ethtool_stats(struct net_device *netdev,
> ICE_PHY_TYPE_HIGH_100G_AUI2_AOC_ACC | \
> ICE_PHY_TYPE_HIGH_100G_AUI2)
>
> +#define ICE_PHY_TYPE_HIGH_MASK_200G (ICE_PHY_TYPE_HIGH_200G_CR4_PAM4 | \
> + ICE_PHY_TYPE_HIGH_200G_SR4 | \
> + ICE_PHY_TYPE_HIGH_200G_FR4 | \
> + ICE_PHY_TYPE_HIGH_200G_LR4 | \
> + ICE_PHY_TYPE_HIGH_200G_DR4 | \
> + ICE_PHY_TYPE_HIGH_200G_KR4_PAM4 | \
> + ICE_PHY_TYPE_HIGH_200G_AUI4_AOC_ACC | \
> + ICE_PHY_TYPE_HIGH_200G_AUI4)
> +
> /**
> * ice_mask_min_supported_speeds
> * @hw: pointer to the HW structure
> @@ -1732,8 +1741,9 @@ ice_mask_min_supported_speeds(struct ice_hw *hw,
> u64 phy_types_high, u64 *phy_types_low)
> {
> /* if QSFP connection with 100G speed, minimum supported speed is 25G */
> - if (*phy_types_low & ICE_PHY_TYPE_LOW_MASK_100G ||
> - phy_types_high & ICE_PHY_TYPE_HIGH_MASK_100G)
> + if ((*phy_types_low & ICE_PHY_TYPE_LOW_MASK_100G) ||
> + (phy_types_high & ICE_PHY_TYPE_HIGH_MASK_100G) ||
> + (phy_types_high & ICE_PHY_TYPE_HIGH_MASK_200G))
> *phy_types_low &= ~ICE_PHY_TYPE_LOW_MASK_MIN_25G;
> else if (!ice_is_100m_speed_supported(hw))
> *phy_types_low &= ~ICE_PHY_TYPE_LOW_MASK_MIN_1G;
> @@ -1876,6 +1886,9 @@ ice_get_settings_link_up(struct ethtool_link_ksettings *ks,
> ice_phy_type_to_ethtool(netdev, ks);
>
> switch (link_info->link_speed) {
> + case ICE_AQ_LINK_SPEED_200GB:
> + ks->base.speed = SPEED_200000;
> + break;
> case ICE_AQ_LINK_SPEED_100GB:
> ks->base.speed = SPEED_100000;
> break;
> diff --git a/drivers/net/ethernet/intel/ice/ice_ethtool.h b/drivers/net/ethernet/intel/ice/ice_ethtool.h
> index b403ee79cd5e..b88e3da06f13 100644
> --- a/drivers/net/ethernet/intel/ice/ice_ethtool.h
> +++ b/drivers/net/ethernet/intel/ice/ice_ethtool.h
> @@ -100,6 +100,14 @@ phy_type_high_lkup[] = {
> [2] = ICE_PHY_TYPE(100GB, 100000baseCR2_Full),
> [3] = ICE_PHY_TYPE(100GB, 100000baseSR2_Full),
> [4] = ICE_PHY_TYPE(100GB, 100000baseCR2_Full),
> + [5] = ICE_PHY_TYPE(200GB, 200000baseCR4_Full),
> + [6] = ICE_PHY_TYPE(200GB, 200000baseSR4_Full),
> + [7] = ICE_PHY_TYPE(200GB, 200000baseLR4_ER4_FR4_Full),
> + [8] = ICE_PHY_TYPE(200GB, 200000baseLR4_ER4_FR4_Full),
> + [9] = ICE_PHY_TYPE(200GB, 200000baseDR4_Full),
> + [10] = ICE_PHY_TYPE(200GB, 200000baseKR4_Full),
> + [11] = ICE_PHY_TYPE(200GB, 200000baseSR4_Full),
> + [12] = ICE_PHY_TYPE(200GB, 200000baseCR4_Full),
> };
>
> #endif /* !_ICE_ETHTOOL_H_ */
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