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Message-ID: <6f6fa5b2-7d93-2695-8de1-4ffe2573bb8e@microchip.com>
Date: Wed, 20 Sep 2023 12:42:27 +0000
From: <Parthiban.Veerasooran@...rochip.com>
To: <andrew@...n.ch>
CC: <davem@...emloft.net>, <edumazet@...gle.com>, <kuba@...nel.org>,
	<pabeni@...hat.com>, <robh+dt@...nel.org>,
	<krzysztof.kozlowski+dt@...aro.org>, <conor+dt@...nel.org>, <corbet@....net>,
	<Steen.Hegelund@...rochip.com>, <rdunlap@...radead.org>, <horms@...nel.org>,
	<casper.casan@...il.com>, <netdev@...r.kernel.org>,
	<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
	<linux-doc@...r.kernel.org>, <Horatiu.Vultur@...rochip.com>,
	<Woojung.Huh@...rochip.com>, <Nicolas.Ferre@...rochip.com>,
	<UNGLinuxDriver@...rochip.com>, <Thorsten.Kummermehr@...rochip.com>
Subject: Re: [RFC PATCH net-next 3/6] net: ethernet: implement OA TC6
 configuration function

Hi Andrew,

On 19/09/23 6:24 pm, Andrew Lunn wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
>>>> +/* Unmasking interrupt fields in IMASK0 */
>>>> +#define HDREM                ~BIT(5)         /* Header Error Mask */
>>>> +#define LOFEM                ~BIT(4)         /* Loss of Framing Error Mask */
>>>> +#define RXBOEM               ~BIT(3)         /* Rx Buffer Overflow Error Mask */
>>>> +#define TXBUEM               ~BIT(2)         /* Tx Buffer Underflow Error Mask */
>>>> +#define TXBOEM               ~BIT(1)         /* Tx Buffer Overflow Error Mask */
>>>> +#define TXPEM                ~BIT(0)         /* Tx Protocol Error Mask */
>>>
>>> Using ~BIT(X) is very usual. I would not do this, Principle of Least
>>> Surprise.
>> Sorry, I don't get your point. Could you please explain bit more?
> 
> Look around kernel header files. How often do you see ~BIT(5)?  My
> guess it is approximately 0. So i'm suggesting you remove the ~ and
> have the user of the #define assemble the mask and then do the ~ .
Ah ok ok, thanks for the clarification.

Best Regards,
Parthiban V
> 
>       Andrew

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