netdev - RE: [PATCH net] net: ethernet: renesas: rswitch Fix PHY station management clock setting

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date: Tue, 26 Sep 2023 07:21:59 +0000
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@...esas.com>
To: Andrew Lunn <andrew@...n.ch>
CC: "s.shtylyov@....ru" <s.shtylyov@....ru>, "davem@...emloft.net"
	<davem@...emloft.net>, "edumazet@...gle.com" <edumazet@...gle.com>,
	"kuba@...nel.org" <kuba@...nel.org>, "pabeni@...hat.com" <pabeni@...hat.com>,
	"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
	"linux-renesas-soc@...r.kernel.org" <linux-renesas-soc@...r.kernel.org>, Tam
 Nguyen <tam.nguyen.xa@...esas.com>, Kuninori Morimoto
	<kuninori.morimoto.gx@...esas.com>
Subject: RE: [PATCH net] net: ethernet: renesas: rswitch Fix PHY station
 management clock setting

Hello Andrew,

> From: Andrew Lunn, Sent: Monday, September 25, 2023 11:18 PM
> 
> On Mon, Sep 25, 2023 at 09:34:16AM +0900, Yoshihiro Shimoda wrote:
> > From: Tam Nguyen <tam.nguyen.xa@...esas.com>
> >
> > Fix the MPIC.PSMCS value following the programming example in the
> > section 6.4.2 Management Data Clock (MDC) Setting, Ethernet MAC IP,
> > S4 Hardware User Manual Rev.1.00.
> >
> > The value is calculated by
> >     MPIC.PSMCS = clk[MHz] / ((MDC frequency[MHz] + 1) * 2)
> > with the input clock frequency of 320MHz and MDC frequency of 2.5MHz.
> > Otherwise, this driver cannot communicate PHYs on the R-Car S4 Starter
> > Kit board.
> 
> If you run this calculation backwards, what frequency does
> MPIC_PSMCS(0x3f) map to?

Thank you for your review! I completely misunderstood the formula. In
other words, the formula cannot calculate backwards. The correct
formula is:

MPIC.PSMCS = clk[MHz] / (MDC frequency[MHz] * 2) - 1

> Is 320MHz really fixed? For all silicon variants? Is it possible to do
> a clk_get_rate() on a clock to get the actual clock rate?

320MHz is really fixed on the current existing all silicon variants.
Yes, it is possible to do a clk_get_rate() on a clock to get the actual
clock rate. So, I'll use clk_get_rate() on v2.

Best regards,
Yoshihiro Shimoda

> 	Andrew