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Message-ID:
<TYBPR01MB534169E4AFC0EEF5A1A50F89D8C3A@TYBPR01MB5341.jpnprd01.prod.outlook.com>
Date: Tue, 26 Sep 2023 09:25:19 +0000
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@...esas.com>
To: Sergey Shtylyov <s.shtylyov@....ru>, "davem@...emloft.net"
<davem@...emloft.net>, "edumazet@...gle.com" <edumazet@...gle.com>,
"kuba@...nel.org" <kuba@...nel.org>, "pabeni@...hat.com" <pabeni@...hat.com>
CC: "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
"linux-renesas-soc@...r.kernel.org" <linux-renesas-soc@...r.kernel.org>, Tam
Nguyen <tam.nguyen.xa@...esas.com>, Kuninori Morimoto
<kuninori.morimoto.gx@...esas.com>
Subject: RE: [PATCH net v2] net: ethernet: renesas: rswitch Fix PHY station
management clock setting
Hello Sergey,
> From: Sergey Shtylyov, Sent: Tuesday, September 26, 2023 6:13 PM
>
> Hello!
>
> You missed a colon after rswitch.
Oops! I'll fix this on v3.
> And historically we used simpler prefixes, like just sh_eth or ravb...
I see. So, I'll fix the subject as "rswitch: Fix PHY station management clock setting".
Best regards,
Yoshihiro Shimoda
> On 9/26/23 11:11 AM, Yoshihiro Shimoda wrote:
>
> > Fix the MPIC.PSMCS value following the programming example in the
> > section 6.4.2 Management Data Clock (MDC) Setting, Ethernet MAC IP,
> > S4 Hardware User Manual Rev.1.00.
> >
> > The value is calculated by
> > MPIC.PSMCS = clk[MHz] / (MDC frequency[MHz] * 2) - 1
> > with the input clock frequency from clk_get_rate() and MDC frequency
> > of 2.5MHz. Otherwise, this driver cannot communicate PHYs on the R-Car
> > S4 Starter Kit board.
> >
> > Fixes: 3590918b5d07 ("net: ethernet: renesas: Add support for "Ethernet Switch"")
> > Reported-by: Tam Nguyen <tam.nguyen.xa@...esas.com>
> > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@...esas.com>
> > Tested-by: Kuninori Morimoto <kuninori.morimoto.gx@...esas.com>
> [...]
>
> MBR, Sergey
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