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Message-ID: <c88ebcd5-614d-41ce-9f13-bc3c0e4920d7@lunn.ch>
Date: Wed, 27 Sep 2023 14:43:46 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Yoshihiro Shimoda <yoshihiro.shimoda.uh@...esas.com>
Cc: s.shtylyov@....ru, davem@...emloft.net, edumazet@...gle.com,
kuba@...nel.org, pabeni@...hat.com, netdev@...r.kernel.org,
linux-renesas-soc@...r.kernel.org,
Tam Nguyen <tam.nguyen.xa@...esas.com>,
Kuninori Morimoto <kuninori.morimoto.gx@...esas.com>
Subject: Re: [PATCH net v3] rswitch: Fix PHY station management clock setting
> +
> + /* MPIC.PSMCS = (clk [MHz] / (MDC frequency [MHz] * 2) - 1.
> + * Calculating PSMCS value as MDC frequency = 2.5MHz. So, multiply
> + * both the numerator and the denominator by 10.
> + */
> + etha->psmcs = clk_get_rate(priv->clk) / 100000 / (25 * 2) - 1;
> }
>
> static int rswitch_device_alloc(struct rswitch_private *priv, int index)
> @@ -1900,6 +1907,10 @@ static int renesas_eth_sw_probe(struct platform_device *pdev)
> return -ENOMEM;
> spin_lock_init(&priv->lock);
>
> + priv->clk = devm_clk_get(&pdev->dev, NULL);
> + if (IS_ERR(priv->clk))
> + return PTR_ERR(priv->clk);
> +
/**
* clk_get_rate - obtain the current clock rate (in Hz) for a clock source.
* This is only valid once the clock source has been enabled.
* @clk: clock source
*/
unsigned long clk_get_rate(struct clk *clk);
I don't see the clock being enabled anywhere.
Also, is the clock documented in the device tree binding?
Andrew
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