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Date: Mon, 9 Oct 2023 13:36:18 -0700
From: Florian Fainelli <f.fainelli@...il.com>
To: "Russell King (Oracle)" <rmk+kernel@...linux.org.uk>,
 Andrew Lunn <andrew@...n.ch>, Heiner Kallweit <hkallweit1@...il.com>
Cc: "David S. Miller" <davem@...emloft.net>,
 Eric Dumazet <edumazet@...gle.com>, Jakub Kicinski <kuba@...nel.org>,
 netdev@...r.kernel.org, Paolo Abeni <pabeni@...hat.com>,
 Vladimir Oltean <olteanv@...il.com>, Linus Walleij <linus.walleij@...aro.org>
Subject: Re: [PATCH net-next 1/3] net: dsa: vsc73xx: add phylink capabilities

On 10/9/23 03:39, Russell King (Oracle) wrote:
> Add phylink capabilities for vsc73xx. Although this switch driver does
> populates the .adjust_link method, dsa_slave_phy_setup() will still be
> used to create phylink instances for the LAN ports, although phylink
> won't be used for shared links.
> 
> There are two different classes of switch - 5+1 and 8 port. The 5+1
> port switches uses port indicies 0-4 for the user interfaces and 6 for
> the CPU port. The 8 port is confusing - some comments in the driver
> imply that port index 7 is used, but the driver actually still uses 6,
> so that is what we go with. Also, there appear to be no DTs in the
> kernel tree that are using the 8 port variety.
> 
> It also looks like port 5 is always skipped.
> 
> The switch supports 10M, 100M and 1G speeds. It is not clear whether
> all these speeds are supported on the CPU interface. It also looks like
> symmetric pause is supported, whether asymmetric pause is as well is
> unclear. However, it looks like the pause configuration is entirely
> static, and doesn't depend on negotiation results.
> 
> So, let's do the best effort we can based on the information found in
> the driver when creating vsc73xx_phylink_get_caps().
> 
> Signed-off-by: Russell King (Oracle) <rmk+kernel@...linux.org.uk>

Reviewed-by: Florian Fainelli <florian.fainelli@...adcom.com>
-- 
Florian


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