netdev - [PATCH net-next v2 1/2] net:dsa:microchip: add property to select internal RMII reference clock

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Message-ID: <20231017072723.14216-1-ante.knezic@helmholz.de>
Date: Tue, 17 Oct 2023 09:27:23 +0200
From: Ante Knezic <ante.knezic@...mholz.de>
To: <olteanv@...il.com>
CC: <andrew@...n.ch>, <ante.knezic@...mholz.de>, <conor+dt@...nel.org>,
	<davem@...emloft.net>, <devicetree@...r.kernel.org>, <edumazet@...gle.com>,
	<f.fainelli@...il.com>, <krzysztof.kozlowski+dt@...aro.org>,
	<kuba@...nel.org>, <linux-kernel@...r.kernel.org>, <marex@...x.de>,
	<netdev@...r.kernel.org>, <pabeni@...hat.com>, <robh+dt@...nel.org>,
	<woojung.huh@...rochip.com>
Subject: [PATCH net-next v2 1/2] net:dsa:microchip: add property to select internal RMII reference clock

On Mon, 16 Oct 2023 13:37:08 +0300, Vladimir Oltean wrote:
> > diff --git a/drivers/net/dsa/microchip/ksz8795.c b/drivers/net/dsa/microchip/ksz8795.c
> > index 91aba470fb2f..78f3a668aa99 100644
> > --- a/drivers/net/dsa/microchip/ksz8795.c
> > +++ b/drivers/net/dsa/microchip/ksz8795.c
> > @@ -1434,6 +1434,11 @@ int ksz8_setup(struct dsa_switch *ds)
> >  	for (i = 0; i < (dev->info->num_vlans / 4); i++)
> >  	        ksz8_r_vlan_entries(dev, i);
> >  
> > +	if (ksz_is_ksz88x3(dev))
> > +	        ksz_cfg(dev, KSZ88X3_REG_FVID_AND_HOST_MODE,
> > +	                KSZ88X3_PORT3_RMII_CLK_INTERNAL,
> > +	                dev->rmii_clk_internal);
> > +
> 
> Can this be done in dev->dev_ops->phylink_mac_config() (which so far has no implementation)
> for port 3 of ksz88x3?

> >  	return ksz8_handle_global_errata(ds);
> >  }
> >  
> > diff --git a/drivers/net/dsa/microchip/ksz8795_reg.h b/drivers/net/dsa/microchip/ksz8795_reg.h
> > index 3c9dae53e4d8..beca974e0171 100644
> > --- a/drivers/net/dsa/microchip/ksz8795_reg.h
> > +++ b/drivers/net/dsa/microchip/ksz8795_reg.h
> > @@ -22,6 +22,9 @@
> >  #define KSZ8863_GLOBAL_SOFTWARE_RESET	BIT(4)
> >  #define KSZ8863_PCS_RESET	        BIT(0)
> >  
> > +#define KSZ88X3_REG_FVID_AND_HOST_MODE  0xC6
> > +#define KSZ88X3_PORT3_RMII_CLK_INTERNAL BIT(3)
> > +
> >  #define REG_SW_CTRL_0                        0x02
> >  
> >  #define SW_NEW_BACKOFF	                BIT(7)
> > diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/microchip/ksz_common.c
> > index b800ace40ce1..0a0a53ce5b1b 100644
> > --- a/drivers/net/dsa/microchip/ksz_common.c
> > +++ b/drivers/net/dsa/microchip/ksz_common.c
> > @@ -4160,6 +4160,9 @@ int ksz_switch_register(struct ksz_device *dev)
> >  	        }
> >  	}
> >  
> > +	dev->rmii_clk_internal = of_property_read_bool(dev->dev->of_node,
> > +	                                               "microchip,rmii-clk-internal");
> 
> Port property.

Yes, I guess we can do it in phylink_mac_config. Or perhaps it would be better
to put everything in ksz8_port_setup if you suggest this is a port specific 
property and not global?
Something like:

@@ -1312,8 +1314,15 @@ void ksz8_port_setup(struct ksz_device *dev, int port, bool cpu_port)
        ksz_port_cfg(dev, port, P_PRIO_CTRL, PORT_802_1P_ENABLE, true);

        if (cpu_port) {
-               if (!ksz_is_ksz88x3(dev))
+               if (!ksz_is_ksz88x3(dev)) {
                        ksz8795_cpu_interface_select(dev, port);
+               } else {
+                       dev->rmii_clk_internal = of_property_read_bool(dev->dev->of_node,
+                                                                      "microchip,rmii-clk-internal");
+                       ksz_cfg(dev, KSZ88X3_REG_FVID_AND_HOST_MODE,
+                               KSZ88X3_PORT3_RMII_CLK_INTERNAL,
+                               dev->rmii_clk_internal);
+               }