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Message-ID: <893a3ad19b28c6bb1bf5ea18dee2fa5855f0c207.1697620929.git.ante.knezic@helmholz.de>
Date: Wed, 18 Oct 2023 11:24:14 +0200
From: Ante Knezic <ante.knezic@...mholz.de>
To: <netdev@...r.kernel.org>
CC: <woojung.huh@...rochip.com>, <andrew@...n.ch>, <f.fainelli@...il.com>,
	<olteanv@...il.com>, <davem@...emloft.net>, <edumazet@...gle.com>,
	<kuba@...nel.org>, <pabeni@...hat.com>, <robh+dt@...nel.org>,
	<krzysztof.kozlowski+dt@...aro.org>, <conor+dt@...nel.org>, <marex@...x.de>,
	<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
	<UNGLinuxDriver@...rochip.com>, Ante Knezic <ante.knezic@...mholz.de>
Subject: [PATCH net-next v3 2/2] net:dsa:microchip: add property to select internal RMII reference clock

Microchip KSZ8863/KSZ8873 have the ability to select between internal
and external RMII reference clock. By default, reference clock
needs to be provided via REFCLKI_3 pin. If required, device can be
setup to provide RMII clock internally so that REFCLKI_3 pin can be
left unconnected.
Add a new "microchip,rmii-clk-internal" property which will set
RMII clock reference to internal. If property is not set, reference
clock needs to be provided externally.

Signed-off-by: Ante Knezic <ante.knezic@...mholz.de>
---
 drivers/net/dsa/microchip/ksz8795.c     | 10 +++++++++-
 drivers/net/dsa/microchip/ksz8795_reg.h |  3 +++
 drivers/net/dsa/microchip/ksz_common.h  |  1 +
 3 files changed, 13 insertions(+), 1 deletion(-)

diff --git a/drivers/net/dsa/microchip/ksz8795.c b/drivers/net/dsa/microchip/ksz8795.c
index 91aba470fb2f..b50ad9552c65 100644
--- a/drivers/net/dsa/microchip/ksz8795.c
+++ b/drivers/net/dsa/microchip/ksz8795.c
@@ -1312,8 +1312,16 @@ void ksz8_port_setup(struct ksz_device *dev, int port, bool cpu_port)
 	ksz_port_cfg(dev, port, P_PRIO_CTRL, PORT_802_1P_ENABLE, true);
 
 	if (cpu_port) {
-		if (!ksz_is_ksz88x3(dev))
+		if (!ksz_is_ksz88x3(dev)) {
 			ksz8795_cpu_interface_select(dev, port);
+		} else {
+			dev->rmii_clk_internal = of_property_read_bool(dev->dev->of_node,
+								       "microchip,rmii-clk-internal");
+
+			ksz_cfg(dev, KSZ88X3_REG_FVID_AND_HOST_MODE,
+				KSZ88X3_PORT3_RMII_CLK_INTERNAL,
+				dev->rmii_clk_internal);
+		}
 
 		member = dsa_user_ports(ds);
 	} else {
diff --git a/drivers/net/dsa/microchip/ksz8795_reg.h b/drivers/net/dsa/microchip/ksz8795_reg.h
index 3c9dae53e4d8..beca974e0171 100644
--- a/drivers/net/dsa/microchip/ksz8795_reg.h
+++ b/drivers/net/dsa/microchip/ksz8795_reg.h
@@ -22,6 +22,9 @@
 #define KSZ8863_GLOBAL_SOFTWARE_RESET	BIT(4)
 #define KSZ8863_PCS_RESET		BIT(0)
 
+#define KSZ88X3_REG_FVID_AND_HOST_MODE  0xC6
+#define KSZ88X3_PORT3_RMII_CLK_INTERNAL BIT(3)
+
 #define REG_SW_CTRL_0			0x02
 
 #define SW_NEW_BACKOFF			BIT(7)
diff --git a/drivers/net/dsa/microchip/ksz_common.h b/drivers/net/dsa/microchip/ksz_common.h
index 8842efca0871..e5b0445fe2ca 100644
--- a/drivers/net/dsa/microchip/ksz_common.h
+++ b/drivers/net/dsa/microchip/ksz_common.h
@@ -163,6 +163,7 @@ struct ksz_device {
 	phy_interface_t compat_interface;
 	bool synclko_125;
 	bool synclko_disable;
+	bool rmii_clk_internal;
 
 	struct vlan_table *vlan_cache;
 
-- 
2.11.0


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