netdev - Re: fix the non-coherent coldfire dma_alloc

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Date: Thu, 19 Oct 2023 23:09:38 +1000
From: Greg Ungerer <gerg@...ux-m68k.org>
To: Christoph Hellwig <hch@....de>, iommu@...ts.linux.dev
Cc: Paul Walmsley <paul.walmsley@...ive.com>,
 Palmer Dabbelt <palmer@...belt.com>, Conor Dooley <conor@...nel.org>,
 Geert Uytterhoeven <geert+renesas@...der.be>,
 Magnus Damm <magnus.damm@...il.com>, Robin Murphy <robin.murphy@....com>,
 Marek Szyprowski <m.szyprowski@...sung.com>,
 Geert Uytterhoeven <geert@...ux-m68k.org>, Wei Fang <wei.fang@....com>,
 Shenwei Wang <shenwei.wang@....com>, Clark Wang <xiaoning.wang@....com>,
 NXP Linux Team <linux-imx@....com>, linux-m68k@...ts.linux-m68k.org,
 netdev@...r.kernel.org, linux-riscv@...ts.infradead.org,
 linux-renesas-soc@...r.kernel.org, Jim Quinlan <james.quinlan@...adcom.com>
Subject: Re: fix the non-coherent coldfire dma_alloc_coherent v2

Hi Christoph,

On 16/10/23 15:47, Christoph Hellwig wrote:
> Hi all,
> 
> this is the next attempt to not return memory that is not DMA coherent
> on coldfire/m68knommu.  The last one needed more fixups in the fec
> driver, which this versions includes.  On top of that I've also added
> a few more cleanups to the core DMA allocation code.
> 
> Jim: any work to support the set_uncached and remap method for arm32
> should probably be based on this, and patch 3 should make that
> selection a little easier.
> 
> Changes since v1:
>   - sort out the dependency mess in RISCV
>   - don't even built non-coherent DMA support for coldfire cores without
>     data caches
>   - apply the fec workarounds to all coldfire platforms with data caches
>   - add a trivial cleanup for m68k dma.c

This looks good to me for the ColdFire changes. I tested it on a 5208
(version 2 core) with all combinations of cache (instruction only,
data only and both) and it worked good in all cases - with the one
configuration fix to patch 9 I sent earlier. So for ColdFire:

Tested-by: Greg Ungerer <gerg@...ux-m68k.org>
Reviewed-by: Greg Ungerer <gerg@...ux-m68k.org>

I don't have a 532x ColdFire board, so I can't directly test the case
of a version 3 core with the FEC hardware block.

Regards
Greg