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Message-ID: <20231020114302.2334660-1-srasheed@marvell.com> Date: Fri, 20 Oct 2023 04:43:01 -0700 From: Shinas Rasheed <srasheed@...vell.com> To: <netdev@...r.kernel.org>, <linux-kernel@...r.kernel.org> CC: <hgani@...vell.com>, <vimleshk@...vell.com>, <egallen@...hat.com>, <mschmidt@...hat.com>, <pabeni@...hat.com>, <horms@...nel.org>, <kuba@...nel.org>, <davem@...emloft.net>, Shinas Rasheed <srasheed@...vell.com>, Veerasenareddy Burru <vburru@...vell.com>, "Sathesh Edara" <sedara@...vell.com>, Eric Dumazet <edumazet@...gle.com> Subject: [PATCH net-next v4] octeon_ep: assert hardware structure sizes Clean up structure defines related to hardware data to be asserted to fixed sizes, as padding is not allowed by hardware. Signed-off-by: Shinas Rasheed <srasheed@...vell.com> --- V4: - Changed packed attributes to static assertions for fixed sizes V3: https://lore.kernel.org/all/20231016092051.2306831-1-srasheed@marvell.com/ - Updated changelog to indicate this is a cleanup V2: https://lore.kernel.org/all/20231010194026.2284786-1-srasheed@marvell.com/ - Updated changelog to provide more information V1: https://lore.kernel.org/all/20231006120225.2259533-1-srasheed@marvell.com/ drivers/net/ethernet/marvell/octeon_ep/octep_rx.h | 3 +++ drivers/net/ethernet/marvell/octeon_ep/octep_tx.h | 4 ++++ 2 files changed, 7 insertions(+) diff --git a/drivers/net/ethernet/marvell/octeon_ep/octep_rx.h b/drivers/net/ethernet/marvell/octeon_ep/octep_rx.h index 782a24f27f3e..49feae80d7d2 100644 --- a/drivers/net/ethernet/marvell/octeon_ep/octep_rx.h +++ b/drivers/net/ethernet/marvell/octeon_ep/octep_rx.h @@ -20,6 +20,7 @@ struct octep_oq_desc_hw { dma_addr_t buffer_ptr; u64 info_ptr; }; +static_assert(sizeof(struct octep_oq_desc_hw) == 16); #define OCTEP_OQ_DESC_SIZE (sizeof(struct octep_oq_desc_hw)) @@ -39,6 +40,7 @@ struct octep_oq_resp_hw_ext { /* checksum verified. */ u64 csum_verified:2; }; +static_assert(sizeof(struct octep_oq_resp_hw_ext) == 8); #define OCTEP_OQ_RESP_HW_EXT_SIZE (sizeof(struct octep_oq_resp_hw_ext)) @@ -50,6 +52,7 @@ struct octep_oq_resp_hw { /* The Length of the packet. */ __be64 length; }; +static_assert(sizeof(struct octep_oq_resp_hw) == 8); #define OCTEP_OQ_RESP_HW_SIZE (sizeof(struct octep_oq_resp_hw)) diff --git a/drivers/net/ethernet/marvell/octeon_ep/octep_tx.h b/drivers/net/ethernet/marvell/octeon_ep/octep_tx.h index 21e75ff9f5e7..86c98b13fc44 100644 --- a/drivers/net/ethernet/marvell/octeon_ep/octep_tx.h +++ b/drivers/net/ethernet/marvell/octeon_ep/octep_tx.h @@ -36,6 +36,7 @@ struct octep_tx_sglist_desc { u16 len[4]; dma_addr_t dma_ptr[4]; }; +static_assert(sizeof(struct octep_tx_sglist_desc) == 40); /* Each Scatter/Gather entry sent to hardwar hold four pointers. * So, number of entries required is (MAX_SKB_FRAGS + 1)/4, where '+1' @@ -239,6 +240,7 @@ struct octep_instr_hdr { /* Reserved3 */ u64 reserved3:1; }; +static_assert(sizeof(struct octep_instr_hdr) == 8); /* Hardware Tx completion response header */ struct octep_instr_resp_hdr { @@ -263,6 +265,7 @@ struct octep_instr_resp_hdr { /* Opcode for the return packet */ u64 opcode:16; }; +static_assert(sizeof(struct octep_instr_hdr) == 8); /* 64-byte Tx instruction format. * Format of instruction for a 64-byte mode input queue. @@ -293,6 +296,7 @@ struct octep_tx_desc_hw { /* Additional headers available in a 64-byte instruction. */ u64 exhdr[4]; }; +static_assert(sizeof(struct octep_tx_desc_hw) == 64); #define OCTEP_IQ_DESC_SIZE (sizeof(struct octep_tx_desc_hw)) #endif /* _OCTEP_TX_H_ */ -- 2.25.1
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