netdev - Re: [PATCH net-next 3/5] net: ipqess: introduce the Qualcomm IPQESS driver

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Message-ID: <CA+HBbNHb2RF3tfDYRTG6AndhmW1U4tvFmiC+rhYwH8SCLqSUzw@mail.gmail.com>
Date: Tue, 24 Oct 2023 18:23:58 +0200
From: Robert Marko <robert.marko@...tura.hr>
To: Andrew Lunn <andrew@...n.ch>
Cc: Romain Gantois <romain.gantois@...tlin.com>, davem@...emloft.net, 
	Rob Herring <robh+dt@...nel.org>, 
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>, Jakub Kicinski <kuba@...nel.org>, 
	Eric Dumazet <edumazet@...gle.com>, Paolo Abeni <pabeni@...hat.com>, netdev@...r.kernel.org, 
	linux-kernel@...r.kernel.org, devicetree@...r.kernel.org, 
	thomas.petazzoni@...tlin.com, Florian Fainelli <f.fainelli@...il.com>, 
	Heiner Kallweit <hkallweit1@...il.com>, Russell King <linux@...linux.org.uk>, 
	linux-arm-kernel@...ts.infradead.org, 
	Vladimir Oltean <vladimir.oltean@....com>, Luka Perkov <luka.perkov@...tura.hr>, 
	Andy Gross <agross@...nel.org>, Bjorn Andersson <andersson@...nel.org>, 
	Konrad Dybcio <konrad.dybcio@...ainline.org>, 
	Maxime Chevallier <maxime.chevallier@...tlin.com>
Subject: Re: [PATCH net-next 3/5] net: ipqess: introduce the Qualcomm IPQESS driver

On Tue, Oct 24, 2023 at 4:08 PM Andrew Lunn <andrew@...n.ch> wrote:
>
> > > > + for (c = 0; c < priv->info->mib_count; c++) {
> > > > +         mib = &ar8327_mib[c];
> > > > +         reg = QCA8K_PORT_MIB_COUNTER(port->index) + mib->offset;
> > > > +
> > > > +         ret = qca8k_read(priv, reg, &val);
> > > > +         if (ret < 0)
> > > > +                 continue;
> > >
> > > Given the switch is built in, is this fast? The 8k driver avoids doing
> > > register reads for this.
> >
> > Sorry, I don't quite understand what you mean. Are you referring to the existing
> > QCA8k DSA driver? From what I've seen, it calls qca8k_get_ethtool_stats defined
> > in qca8k-common.c and this uses the same register read.
>
> It should actually build an Ethernet frame containing a command to get
> most of the statistics in one operation. That frame is sent to the
> switch over the SoCs ethernet interface. The switch replies with a
> frame containing the statistics. This should be faster than doing lots
> of register reads over a slow MDIO bus.
>
> Now, given that this switch is built into the SoC, i assume the MDIO
> bus is gone, so register access is fast. So you don't need to use
> Ethernet frames.

It is being accessed as regular MMIO so the MDIO bottleneck is not present,
so we never tried if the special ethernet packets are even support, especially
since the tag is completely different from that in regular qca8k switches.

Regards,
Robert
>
>          Andrew



-- 
Robert Marko
Staff Embedded Linux Engineer
Sartura Ltd.
Lendavska ulica 16a
10000 Zagreb, Croatia
Email: robert.marko@...tura.hr
Web: www.sartura.hr