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Message-ID: <e740a206-37af-49b1-a6b6-baa3c99165c0@lunn.ch>
Date: Wed, 15 Nov 2023 16:11:11 +0100
From: Andrew Lunn <andrew@...n.ch>
To: Luo Jie <quic_luoj@...cinc.com>
Cc: agross@...nel.org, andersson@...nel.org, konrad.dybcio@...aro.org,
davem@...emloft.net, edumazet@...gle.com, kuba@...nel.org,
pabeni@...hat.com, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
hkallweit1@...il.com, linux@...linux.org.uk,
robert.marko@...tura.hr, linux-arm-msm@...r.kernel.org,
netdev@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, quic_srichara@...cinc.com
Subject: Re: [PATCH 3/9] net: mdio: ipq4019: Enable GPIO reset for ipq5332
platform
On Wed, Nov 15, 2023 at 11:25:09AM +0800, Luo Jie wrote:
> Before doing GPIO reset on the MDIO slave devices, the common clock
> output to MDIO slave device should be enabled, and the related GCC
> clocks also need to be configured.
>
> Because of these extra configurations, the MDIO bus level GPIO and
> PHY device level GPIO can't be leveraged.
Its not clear to me why the normal reset cannot be used. The MBIO bus
driver can probe, setup the clocks, and then register the MDIO bus to
the core. The core can then use the GPIO resets.
What am i missing?
Andrew
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