netdev - Re: [PATCH v3 2/6] net: phy: introduce core support for phy-mode = "10g-qxgmii"

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Message-ID: <6a44ac62-50a8-4f31-9504-10a0d12791f4@quicinc.com>
Date: Thu, 16 Nov 2023 15:35:12 +0800
From: Jie Luo <quic_luoj@...cinc.com>
To: Conor Dooley <conor@...nel.org>
CC: <andrew@...n.ch>, <davem@...emloft.net>, <edumazet@...gle.com>,
        <kuba@...nel.org>, <pabeni@...hat.com>, <robh+dt@...nel.org>,
        <krzysztof.kozlowski+dt@...aro.org>, <conor+dt@...nel.org>,
        <hkallweit1@...il.com>, <linux@...linux.org.uk>, <corbet@....net>,
        <netdev@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <linux-doc@...r.kernel.org>
Subject: Re: [PATCH v3 2/6] net: phy: introduce core support for phy-mode =
 "10g-qxgmii"



On 11/15/2023 10:31 PM, Conor Dooley wrote:
> On Wed, Nov 15, 2023 at 10:06:26PM +0800, Luo Jie wrote:
>> From: Vladimir Oltean <vladimir.oltean@....com>
>>
>> 10G-QXGMII is a MAC-to-PHY interface defined by the USXGMII multiport
>> specification. It uses the same signaling as USXGMII, but it multiplexes
>> 4 ports over the link, resulting in a maximum speed of 2.5G per port.
>>
>> Some in-tree SoCs like the NXP LS1028A use "usxgmii" when they mean
>> either the single-port USXGMII or the quad-port 10G-QXGMII variant, and
>> they could get away just fine with that thus far. But there is a need to
>> distinguish between the 2 as far as SerDes drivers are concerned.
>>
>> Signed-off-by: Vladimir Oltean <vladimir.oltean@....com>
>> Signed-off-by: Luo Jie <quic_luoj@...cinc.com>
>> ---
>>   .../devicetree/bindings/net/ethernet-controller.yaml |  1 +
> 
> I know it is one line, but bindings need to be in their own patches
> please.

Ok, will split the binding change out as a separate patch.
Thanks Conor for the suggestion.