| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-Id: <20231120135041.15259-13-ansuelsmth@gmail.com>
Date: Mon, 20 Nov 2023 14:50:39 +0100
From: Christian Marangi <ansuelsmth@...il.com>
To: "David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>,
Andrew Lunn <andrew@...n.ch>,
Heiner Kallweit <hkallweit1@...il.com>,
Russell King <linux@...linux.org.uk>,
Florian Fainelli <florian.fainelli@...adcom.com>,
Broadcom internal kernel review list <bcm-kernel-feedback-list@...adcom.com>,
Daniel Golle <daniel@...rotopia.org>,
Qingfang Deng <dqfext@...il.com>,
SkyLake Huang <SkyLake.Huang@...iatek.com>,
Matthias Brugger <matthias.bgg@...il.com>,
AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>,
David Epping <david.epping@...singlinkelectronics.com>,
Vladimir Oltean <olteanv@...il.com>,
Christian Marangi <ansuelsmth@...il.com>,
"Russell King (Oracle)" <rmk+kernel@...linux.org.uk>,
Harini Katakam <harini.katakam@....com>,
Simon Horman <horms@...nel.org>,
Robert Marko <robert.marko@...tura.hr>,
netdev@...r.kernel.org,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
linux-arm-msm@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org
Subject: [net-next RFC PATCH 12/14] dt-bindings: net: Document Qcom QCA807x PHY package
Document Qcom QCA807x PHY package.
Qualcomm QCA807X Ethernet PHY is PHY package of 2 or 5
IEEE 802.3 clause 22 compliant 10BASE-Te, 100BASE-TX and
1000BASE-T PHY-s.
Document the required property to make the PHY package correctly
configure and work.
Signed-off-by: Christian Marangi <ansuelsmth@...il.com>
---
.../devicetree/bindings/net/qcom,qca807x.yaml | 143 ++++++++++++++++++
1 file changed, 143 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/qcom,qca807x.yaml
diff --git a/Documentation/devicetree/bindings/net/qcom,qca807x.yaml b/Documentation/devicetree/bindings/net/qcom,qca807x.yaml
new file mode 100644
index 000000000000..c2d59068d015
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/qcom,qca807x.yaml
@@ -0,0 +1,143 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/qcom,qca807x.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm QCA807X Ethernet PHY
+
+maintainers:
+ - Christian Marangi <ansuelsmth@...il.com>
+ - Robert Marko <robert.marko@...tura.hr>
+
+description: |
+ Qualcomm QCA807X Ethernet PHY is PHY package of 2 or 5
+ IEEE 802.3 clause 22 compliant 10BASE-Te, 100BASE-TX and
+ 1000BASE-T PHY-s.
+
+ They feature 2 SerDes, one for PSGMII or QSGMII connection with
+ MAC, while second one is SGMII for connection to MAC or fiber.
+
+ Both models have a combo port that supports 1000BASE-X and
+ 100BASE-FX fiber.
+
+ Each PHY inside of QCA807x series has 4 digitally controlled
+ output only pins that natively drive LED-s for up to 2 attached
+ LEDs. Some vendor also use these 4 output for GPIO usage without
+ attaching LEDs.
+
+ Note that output pins can be set to drive LEDs OR GPIO, mixed
+ definition are not accepted.
+
+allOf:
+ - $ref: ethernet-phy-package.yaml#
+
+select:
+ properties:
+ compatible:
+ contains:
+ const: ethernet-phy-package
+ patternProperties:
+ ^ethernet-phy(@[a-f0-9]+)?$:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - ethernet-phy-id004d.d0b2
+ - ethernet-phy-id004d.d0b1
+ required:
+ - compatible
+
+properties:
+ global-phys:
+ maxItems: 2
+
+ global-phy-names:
+ items:
+ - const: combo
+ - const: pqsgmii
+
+ phy-connection-type:
+ enum:
+ - qsgmii
+ - psgmii
+
+patternProperties:
+ ^ethernet-phy(@[a-f0-9]+)?$:
+ $ref: /schemas/net/ethernet-phy.yaml#
+
+ properties:
+ gpio-controller:
+ description: set the output lines as GPIO instead of LEDs
+ type: boolean
+
+ '#gpio-cells':
+ description: number of GPIO cells for the PHY
+ const: 2
+
+ dependencies:
+ gpio-controller: ['#gpio-cells']
+
+ unevaluatedProperties: false
+
+required:
+ - compatible
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/leds/common.h>
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethernet-phy-package {
+ compatible = "ethernet-phy-package";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ global-phys = <&qca8075_4>, <&qca8075_psgmii>;
+ global-phy-names = "combo", "pqsgmii";
+
+ qca8075_1: ethernet-phy@1 {
+ compatible = "ethernet-phy-id004d.d0b2";
+ reg = <1>;
+
+ leds {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ led@0 {
+ reg = <0>;
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_LAN;
+ default-state = "keep";
+ };
+ };
+ };
+
+ qca8075_2: ethernet-phy@2 {
+ compatible = "ethernet-phy-id004d.d0b2";
+ reg = <2>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ qca8075_3: ethernet-phy@3 {
+ compatible = "ethernet-phy-id004d.d0b2";
+ reg = <3>;
+ };
+
+ qca8075_4: ethernet-phy@4 {
+ compatible = "ethernet-phy-id004d.d0b2";
+ reg = <4>;
+ };
+
+ qca8075_pqsgmii: ethernet-phy@5 {
+ reg = <5>;
+ };
+ };
+ };
--
2.40.1
Powered by blists - more mailing lists