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Message-Id: <20231120193504.5922-1-ansuelsmth@gmail.com>
Date: Mon, 20 Nov 2023 20:35:04 +0100
From: Christian Marangi <ansuelsmth@...il.com>
To: Andrew Lunn <andrew@...n.ch>,
Heiner Kallweit <hkallweit1@...il.com>,
Russell King <linux@...linux.org.uk>,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>,
Christian Marangi <ansuelsmth@...il.com>,
Robert Marko <robimarko@...il.com>,
netdev@...r.kernel.org,
linux-kernel@...r.kernel.org
Cc: kernel test robot <lkp@...el.com>
Subject: [net-next PATCH] net: phy: aquantia: make mailbox interface4 lsw addr mask more specific
It seems some arch (s390) require a more specific mask for FIELD_PREP
and doesn't like using GENMASK(15, 2) for u16 values.
Fix the compilation error by adding the additional mask for the BITS
that the PHY ignore and AND the passed addr with the real mask that the
PHY will parse for the mailbox interface 4 addr to make sure extra
values are correctly removed.
Reported-by: kernel test robot <lkp@...el.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202311210414.sEJZjlcD-lkp@intel.com/
Fixes: e93984ebc1c8 ("net: phy: aquantia: add firmware load support")
Signed-off-by: Christian Marangi <ansuelsmth@...il.com>
---
drivers/net/phy/aquantia/aquantia.h | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/net/phy/aquantia/aquantia.h b/drivers/net/phy/aquantia/aquantia.h
index 9ed38972abdb..7685bfaf0b07 100644
--- a/drivers/net/phy/aquantia/aquantia.h
+++ b/drivers/net/phy/aquantia/aquantia.h
@@ -30,7 +30,10 @@
#define VEND1_GLOBAL_MAILBOX_INTERFACE3_MSW_ADDR(x) FIELD_PREP(VEND1_GLOBAL_MAILBOX_INTERFACE3_MSW_ADDR_MASK, (u16)((x) >> 16))
#define VEND1_GLOBAL_MAILBOX_INTERFACE4 0x0203
#define VEND1_GLOBAL_MAILBOX_INTERFACE4_LSW_ADDR_MASK GENMASK(15, 2)
-#define VEND1_GLOBAL_MAILBOX_INTERFACE4_LSW_ADDR(x) FIELD_PREP(VEND1_GLOBAL_MAILBOX_INTERFACE4_LSW_ADDR_MASK, (u16)(x))
+#define VEND1_GLOBAL_MAILBOX_INTERFACE4_LSW_ADDR_DONT_CARE_MASK GENMASK(1, 0)
+#define VEND1_GLOBAL_MAILBOX_INTERFACE4_LSW_ADDR(x) FIELD_PREP(VEND1_GLOBAL_MAILBOX_INTERFACE4_LSW_ADDR_MASK | \
+ VEND1_GLOBAL_MAILBOX_INTERFACE4_LSW_ADDR_DONT_CARE_MASK, \
+ (u16)((x) & VEND1_GLOBAL_MAILBOX_INTERFACE4_LSW_ADDR_MASK))
#define VEND1_GLOBAL_MAILBOX_INTERFACE5 0x0204
#define VEND1_GLOBAL_MAILBOX_INTERFACE5_MSW_DATA_MASK GENMASK(15, 0)
--
2.40.1
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