netdev - Re: [PATCH v1 2/2] net: stmmac: Add NPCM support

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Date: Wed, 22 Nov 2023 19:50:57 +0200
From: Tomer Maimon <tmaimon77@...il.com>
To: Andrew Lunn <andrew@...n.ch>
Cc: alexandre.torgue@...s.st.com, tali.perry1@...il.com, edumazet@...gle.com, 
	krzysztof.kozlowski+dt@...aro.org, linux-stm32@...md-mailman.stormreply.com, 
	benjaminfair@...gle.com, openbmc@...ts.ozlabs.org, joabreu@...opsys.com, 
	joel@....id.au, devicetree@...r.kernel.org, j.neuschaefer@....net, 
	robh+dt@...nel.org, peppe.cavallaro@...com, 
	linux-arm-kernel@...ts.infradead.org, avifishman70@...il.com, 
	venture@...gle.com, linux-kernel@...r.kernel.org, mcoquelin.stm32@...il.com, 
	netdev@...r.kernel.org, davem@...emloft.net
Subject: Re: [PATCH v1 2/2] net: stmmac: Add NPCM support

Hi Andrew,

Thanks for your comments

On Tue, 21 Nov 2023 at 18:42, Andrew Lunn <andrew@...n.ch> wrote:
>
> > +void npcm_dwmac_pcs_init(struct npcm_dwmac *dwmac, struct device *dev,
> > +                      struct plat_stmmacenet_data *plat_dat)
> > +{
> > +     u16 val;
> > +
> > +     iowrite16((u16)(SR_MII_CTRL >> 9), dwmac->reg + IND_AC_BA_REG);
> > +     val = ioread16(dwmac->reg + PCS_SR_MII_CTRL_REG);
> > +     val |= PCS_RST;
> > +     iowrite16(val, dwmac->reg + PCS_SR_MII_CTRL_REG);
> > +
> > +     while (val & PCS_RST)
> > +             val = ioread16(dwmac->reg + PCS_SR_MII_CTRL_REG);
> > +
> > +     val &= ~(PCS_AN_ENABLE);
> > +     iowrite16(val, dwmac->reg + PCS_SR_MII_CTRL_REG);
> > +}
>
> Is this a licensed PCS implementation? Or home grown? If its been
> licensed from somebody, it maybe should live in driver/net/pcs, so
> others can reuse it when they license the same core.
we are using DWC PCS, I don't see support for DWC PCS and I am not
sure it is supposed to be supported at /drivers/net/pcs
I do see a patch set to support DWC PCS but I don't think it answers my needs
https://patchwork.ozlabs.org/project/netdev/patch/1559674736-2190-3-git-send-email-weifeng.voon@intel.com/
>
>        Andrew

Thanks,

Tomer