netdev - Re: [PATCH v1 2/2] net: stmmac: Add NPCM support

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <a551aefa-777d-4fd3-b1a5-086dc3e62646@lunn.ch>
Date: Wed, 29 Nov 2023 00:31:21 +0100
From: Andrew Lunn <andrew@...n.ch>
To: Tomer Maimon <tmaimon77@...il.com>
Cc: alexandre.torgue@...s.st.com, tali.perry1@...il.com,
	edumazet@...gle.com, krzysztof.kozlowski+dt@...aro.org,
	linux-stm32@...md-mailman.stormreply.com, benjaminfair@...gle.com,
	openbmc@...ts.ozlabs.org, joabreu@...opsys.com, joel@....id.au,
	devicetree@...r.kernel.org, j.neuschaefer@....net,
	robh+dt@...nel.org, peppe.cavallaro@...com,
	linux-arm-kernel@...ts.infradead.org, avifishman70@...il.com,
	venture@...gle.com, linux-kernel@...r.kernel.org,
	mcoquelin.stm32@...il.com, netdev@...r.kernel.org,
	davem@...emloft.net
Subject: Re: [PATCH v1 2/2] net: stmmac: Add NPCM support

On Mon, Nov 27, 2023 at 05:19:15PM +0200, Tomer Maimon wrote:
> Hi Andrew,
> 
> I took a look at the xpcs driver and the stmmac driver and it doesn't
> cover NPCM use.
> 
> in the NPCM case the stmmac ID=0x37 therefore the driver is linked to DWMAC1000
> https://elixir.bootlin.com/linux/v6.7-rc2/source/drivers/net/ethernet/stmicro/stmmac/hwif.c#L139
> 
> to enable the xpcs, the stmmac should support xgmac or gmac4 and in
> the NPCM is support only gmac.
> https://elixir.bootlin.com/linux/v6.7-rc2/source/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c#L555
> https://elixir.bootlin.com/linux/v6.7-rc2/source/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c#L573
> 
> and the most important thing is that the XPCS is handled through an
> indirect register access and not through MDIO. the MDIO is connected
> to the external PHY and not to the XPCS.

What really matters here is, is the PCS hardware block you have an
XPCS? We don't want two drivers for the same block of hardware. 

MDIO vs indirect register access can be solved with a bit of
layering. That is not a reason to write a second driver.

	Andrew