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Date: Thu, 30 Nov 2023 13:46:30 -0500
From: Min Li <lnimi@...mail.com>
To: richardcochran@...il.com,
	lee@...nel.org
Cc: linux-kernel@...r.kernel.org,
	netdev@...r.kernel.org,
	Min Li <min.li.xe@...esas.com>
Subject: [PATCH net-next v6 2/6] ptp: clockmatrix: set write phase timer to 0 when not in PCW mode

From: Min Li <min.li.xe@...esas.com>

In order for phase pull-in to work, write phase timer shall be 0
when not in write phase mode.

Signed-off-by: Min Li <min.li.xe@...esas.com>
---
 drivers/ptp/ptp_clockmatrix.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/drivers/ptp/ptp_clockmatrix.c b/drivers/ptp/ptp_clockmatrix.c
index f8556627befa..6d55da54e496 100644
--- a/drivers/ptp/ptp_clockmatrix.c
+++ b/drivers/ptp/ptp_clockmatrix.c
@@ -1396,6 +1396,20 @@ static int idtcm_set_pll_mode(struct idtcm_channel *channel,
 	struct idtcm *idtcm = channel->idtcm;
 	int err;
 	u8 dpll_mode;
+	u8 timeout = 0;
+
+	/* Setup WF/WP timer for phase pull-in to work correctly */
+	err = idtcm_write(idtcm, channel->dpll_n, DPLL_WF_TIMER,
+			  &timeout, sizeof(timeout));
+	if (err)
+		return err;
+
+	if (mode == PLL_MODE_WRITE_PHASE)
+		timeout = 160;
+	err = idtcm_write(idtcm, channel->dpll_n, DPLL_WP_TIMER,
+			  &timeout, sizeof(timeout));
+	if (err)
+		return err;
 
 	err = idtcm_read(idtcm, channel->dpll_n,
 			 IDTCM_FW_REG(idtcm->fw_ver, V520, DPLL_MODE),
-- 
2.39.2


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