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Message-ID:
<PH7PR14MB6163385C72F5E88748A9F6A7E384A@PH7PR14MB6163.namprd14.prod.outlook.com>
Date: Wed, 6 Dec 2023 21:43:01 +0000
From: Michal Smulski <Michal.Smulski@...a.com>
To: Tobias Waldekranz <tobias@...dekranz.com>, "davem@...emloft.net"
<davem@...emloft.net>, "kuba@...nel.org" <kuba@...nel.org>
CC: "andrew@...n.ch" <andrew@...n.ch>, "f.fainelli@...il.com"
<f.fainelli@...il.com>, "olteanv@...il.com" <olteanv@...il.com>,
"linux@...linux.org.uk" <linux@...linux.org.uk>, "netdev@...r.kernel.org"
<netdev@...r.kernel.org>
Subject: RE: [PATCH net] net: dsa: mv88e6xxx: Restore USXGMII support for
6393X
Tested-by: Michal Smulski <michal.smulski@...a.com>
-----Original Message-----
From: Michal Smulski <michal.smulski@...a.com>
Sent: Wednesday, December 6, 2023 12:38 PM
To: Tobias Waldekranz <tobias@...dekranz.com>; davem@...emloft.net; kuba@...nel.org
Cc: andrew@...n.ch; f.fainelli@...il.com; olteanv@...il.com; linux@...linux.org.uk; netdev@...r.kernel.org
Subject: RE: [PATCH net] net: dsa: mv88e6xxx: Restore USXGMII support for 6393X
I confirm that applying this patch to net-next tree works (and it is required) on my hardware.
Here is log from the kernel running on the actual hardware:
[ 49.818070] mv88e6085 0x0000000008b96000:02: switch 0x1920 detected: Marvell 88E6191X, revision 0
[ 50.429506] mv88e6085 0x0000000008b96000:02: configuring for inband/usxgmii link mode
[ 50.509099] mv88e6085 0x0000000008b96000:02 p1 (uninitialized): PHY [!soc!mdio@...6000!switch0@...dio:01] driver [Marvell 88E6393 Family] (irq=388)
[ 50.577062] mv88e6085 0x0000000008b96000:02 p2 (uninitialized): PHY [!soc!mdio@...6000!switch0@...dio:02] driver [Marvell 88E6393 Family] (irq=389)
[ 50.635256] mv88e6085 0x0000000008b96000:02: Link is Up - 10Gbps/Full - flow control off
[ 50.641109] mv88e6085 0x0000000008b96000:02 p3 (uninitialized): PHY [!soc!mdio@...6000!switch0@...dio:03] driver [Marvell 88E6393 Family] (irq=391)
[ 50.697091] mv88e6085 0x0000000008b96000:02 p4 (uninitialized): PHY [!soc!mdio@...6000!switch0@...dio:04] driver [Marvell 88E6393 Family] (irq=392)
[ 50.725072] mv88e6085 0x0000000008b96000:02 p5 (uninitialized): PHY [!soc!mdio@...6000!switch0@...dio:05] driver [Marvell 88E6393 Family] (irq=393)
[ 50.753074] mv88e6085 0x0000000008b96000:02 p6 (uninitialized): PHY [!soc!mdio@...6000!switch0@...dio:06] driver [Marvell 88E6393 Family] (irq=394)
[ 50.781085] mv88e6085 0x0000000008b96000:02 p7 (uninitialized): PHY [!soc!mdio@...6000!switch0@...dio:07] driver [Marvell 88E6393 Family] (irq=395)
[ 50.809080] mv88e6085 0x0000000008b96000:02 p8 (uninitialized): PHY [!soc!mdio@...6000!switch0@...dio:08] driver [Marvell 88E6393 Family] (irq=396)
[ 50.815677] DSA: tree 0 setup
[ 170.719608] fsl_dpaa2_eth dpni.3 eth1: configuring for inband/usxgmii link mode [ 170.735697] fsl_dpaa2_eth dpni.3 eth1: Link is Up - 10Gbps/Full - flow control off [ 170.813015] mv88e6085 0x0000000008b96000:02 p8: configuring for phy/gmii link mode [ 170.913510] mv88e6085 0x0000000008b96000:02 p7: configuring for phy/gmii link mode [ 171.014155] mv88e6085 0x0000000008b96000:02 p6: configuring for phy/gmii link mode [ 171.119832] mv88e6085 0x0000000008b96000:02 p5: configuring for phy/gmii link mode [ 171.230594] mv88e6085 0x0000000008b96000:02 p4: configuring for phy/gmii link mode [ 171.346344] mv88e6085 0x0000000008b96000:02 p3: configuring for phy/gmii link mode [ 171.472394] mv88e6085 0x0000000008b96000:02 p2: configuring for phy/gmii link mode [ 171.594045] mv88e6085 0x0000000008b96000:02 p1: configuring for phy/gmii link mode [ 969.248179] mv88e6085 0x0000000008b96000:02 p8: Link is Up - 1Gbps/Full - flow control rx/tx [ 1089.691582] mv88e6085 0x0000000008b96000:02 p8: Link is Down [ 1452.761369] mv88e6085 0x0000000008b96000:02 p8: Link is Up - 1Gbps/Full - flow control rx/tx
Michal
-----Original Message-----
From: Tobias Waldekranz <tobias@...dekranz.com>
Sent: Tuesday, December 5, 2023 2:14 PM
To: davem@...emloft.net; kuba@...nel.org
Cc: andrew@...n.ch; f.fainelli@...il.com; olteanv@...il.com; linux@...linux.org.uk; Michal Smulski <michal.smulski@...a.com>; netdev@...r.kernel.org
Subject: [PATCH net] net: dsa: mv88e6xxx: Restore USXGMII support for 6393X
CAUTION: This email is originated from outside of the organization. Do not click links or open attachments unless you recognize the sender and know the content is safe.
In 4a56212774ac, USXGMII support was added for 6393X, but this was lost in the PCS conversion (the blamed commit), most likely because these efforts where more or less done in parallel.
Restore this feature by porting Michal's patch to fit the new implementation.
Fixes: e5b732a275f5 ("net: dsa: mv88e6xxx: convert 88e639x to phylink_pcs")
Signed-off-by: Tobias Waldekranz <tobias@...dekranz.com>
---
drivers/net/dsa/mv88e6xxx/pcs-639x.c | 31 ++++++++++++++++++++++++++--
1 file changed, 29 insertions(+), 2 deletions(-)
diff --git a/drivers/net/dsa/mv88e6xxx/pcs-639x.c b/drivers/net/dsa/mv88e6xxx/pcs-639x.c
index 9a8429f5d09c..d758a6c1b226 100644
--- a/drivers/net/dsa/mv88e6xxx/pcs-639x.c
+++ b/drivers/net/dsa/mv88e6xxx/pcs-639x.c
@@ -465,6 +465,7 @@ mv88e639x_pcs_select(struct mv88e6xxx_chip *chip, int port,
case PHY_INTERFACE_MODE_10GBASER:
case PHY_INTERFACE_MODE_XAUI:
case PHY_INTERFACE_MODE_RXAUI:
+ case PHY_INTERFACE_MODE_USXGMII:
return &mpcs->xg_pcs;
default:
@@ -873,7 +874,8 @@ static int mv88e6393x_xg_pcs_post_config(struct phylink_pcs *pcs,
struct mv88e639x_pcs *mpcs = xg_pcs_to_mv88e639x_pcs(pcs);
int err;
- if (interface == PHY_INTERFACE_MODE_10GBASER) {
+ if (interface == PHY_INTERFACE_MODE_10GBASER ||
+ interface == PHY_INTERFACE_MODE_USXGMII) {
err = mv88e6393x_erratum_5_2(mpcs);
if (err)
return err;
@@ -886,12 +888,37 @@ static int mv88e6393x_xg_pcs_post_config(struct phylink_pcs *pcs,
return mv88e639x_xg_pcs_enable(mpcs); }
+static void mv88e6393x_xg_pcs_get_state(struct phylink_pcs *pcs,
+ struct phylink_link_state
+*state) {
+ struct mv88e639x_pcs *mpcs = xg_pcs_to_mv88e639x_pcs(pcs);
+ u16 status, lp_status;
+ int err;
+
+ if (state->interface != PHY_INTERFACE_MODE_USXGMII)
+ return mv88e639x_xg_pcs_get_state(pcs, state);
+
+ state->link = false;
+
+ err = mv88e639x_read(mpcs, MV88E6390_USXGMII_PHY_STATUS, &status);
+ err = err ? : mv88e639x_read(mpcs, MV88E6390_USXGMII_LP_STATUS, &lp_status);
+ if (err) {
+ dev_err(mpcs->mdio.dev.parent,
+ "can't read USXGMII status: %pe\n", ERR_PTR(err));
+ return;
+ }
+
+ state->link = !!(status & MDIO_USXGMII_LINK);
+ state->an_complete = state->link;
+ phylink_decode_usxgmii_word(state, lp_status); }
+
static const struct phylink_pcs_ops mv88e6393x_xg_pcs_ops = {
.pcs_enable = mv88e6393x_xg_pcs_enable,
.pcs_disable = mv88e6393x_xg_pcs_disable,
.pcs_pre_config = mv88e6393x_xg_pcs_pre_config,
.pcs_post_config = mv88e6393x_xg_pcs_post_config,
- .pcs_get_state = mv88e639x_xg_pcs_get_state,
+ .pcs_get_state = mv88e6393x_xg_pcs_get_state,
.pcs_config = mv88e639x_xg_pcs_config, };
--
2.34.1
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