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Message-ID: <8a7d2d11-a299-42e0-960f-a6916e9b54fe@lunn.ch>
Date: Sat, 16 Dec 2023 16:47:06 +0100
From: Andrew Lunn <andrew@...n.ch>
To: Yanteng Si <siyanteng@...ngson.cn>
Cc: hkallweit1@...il.com, peppe.cavallaro@...com,
alexandre.torgue@...s.st.com, joabreu@...opsys.com,
fancer.lancer@...il.com, Jose.Abreu@...opsys.com,
chenhuacai@...ngson.cn, linux@...linux.org.uk,
guyinggang@...ngson.cn, netdev@...r.kernel.org,
loongarch@...ts.linux.dev, chris.chenfeiyang@...il.com
Subject: Re: [PATCH v6 5/9] net: stmmac: Add Loongson-specific register
definitions
On Wed, Dec 13, 2023 at 06:14:23PM +0800, Yanteng Si wrote:
> There are two types of Loongson DWGMAC. The first type shares the same
> register definitions and has similar logic as dwmac1000. The second type
> uses several different register definitions.
>
> Simply put, we split some single bit fields into double bits fileds:
>
> DMA_INTR_ENA_NIE = 0x00040000 + 0x00020000
> DMA_INTR_ENA_AIE = 0x00010000 + 0x00008000
> DMA_STATUS_NIS = 0x00040000 + 0x00020000
> DMA_STATUS_AIS = 0x00010000 + 0x00008000
> DMA_STATUS_FBI = 0x00002000 + 0x00001000
What is missing here is why? What are the second bits used for? And
why does the driver not care which bit is set when handing interrupts?
Andrew
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