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Message-ID: <20231220155518.15692-12-kabel@kernel.org>
Date: Wed, 20 Dec 2023 16:55:14 +0100
From: Marek Behún <kabel@...nel.org>
To: netdev@...r.kernel.org,
	Andrew Lunn <andrew@...n.ch>,
	"David S. Miller" <davem@...emloft.net>,
	Jakub Kicinski <kuba@...nel.org>,
	Paolo Abeni <pabeni@...hat.com>
Cc: Russell King <rmk+kernel@...linux.org.uk>,
	Alexander Couzens <lynxis@...0.eu>,
	Daniel Golle <daniel@...rotopia.org>,
	Heiner Kallweit <hkallweit1@...il.com>,
	Willy Liu <willy.liu@...ltek.com>,
	Ioana Ciornei <ioana.ciornei@....com>,
	Marek Mojík <marek.mojik@....cz>,
	Maximilián Maliar <maximilian.maliar@....cz>,
	Marek Behún <kabel@...nel.org>
Subject: [PATCH net-next 11/15] net: phy: realtek: use generic c45 status reading with 1000baseT vendor extension for rtl822x

Now that rtl822x PHYs .read_mmd() and .write_mmd() methods support
accessing all MMD registers, use the generic clause 45 function
genphy_c45_read_status() instead of the current clause 22 version for
reading status for the rtl822x series of Realtek transceivers.

Because 802.3-2018 does not define MMD registers for reading 1000baseT
autonegotiation status, use vendor specific MMD register for this.

Signed-off-by: Marek Behún <kabel@...nel.org>
---
 drivers/net/phy/realtek.c | 28 ++++++++--------------------
 1 file changed, 8 insertions(+), 20 deletions(-)

diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c
index 592de975248f..f36b2bfabe57 100644
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -55,6 +55,7 @@
 #define RTL8201F_IER				0x13
 
 #define RTL8221_GBCR				0xa412
+#define RTL8221_GANLPAR				0xa414
 
 #define RTL8366RB_POWER_SAVE			0x15
 #define RTL8366RB_POWER_SAVE_ON			BIT(12)
@@ -678,30 +679,17 @@ static int rtl822x_config_aneg(struct phy_device *phydev)
 
 static int rtl822x_read_status(struct phy_device *phydev)
 {
-	int ret;
+	int val;
 
 	if (phydev->autoneg == AUTONEG_ENABLE) {
-		int lpadv = phy_read_paged(phydev, 0xa5d, 0x13);
-
-		if (lpadv < 0)
-			return lpadv;
-
-		linkmode_mod_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
-				 phydev->lp_advertising,
-				 lpadv & MDIO_AN_10GBT_STAT_LP10G);
-		linkmode_mod_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT,
-				 phydev->lp_advertising,
-				 lpadv & MDIO_AN_10GBT_STAT_LP5G);
-		linkmode_mod_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
-				 phydev->lp_advertising,
-				 lpadv & MDIO_AN_10GBT_STAT_LP2_5G);
-	}
+		val = phy_read_mmd(phydev, MDIO_MMD_VEND2, RTL8221_GANLPAR);
+		if (val < 0)
+			return val;
 
-	ret = genphy_read_status(phydev);
-	if (ret < 0)
-		return ret;
+		mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, val);
+	}
 
-	return rtlgen_get_speed(phydev);
+	return genphy_c45_read_status(phydev);
 }
 
 static bool rtlgen_supports_2_5gbps(struct phy_device *phydev)
-- 
2.41.0


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