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Message-ID: <20240102074408.1049203-1-ericwouds@gmail.com>
Date: Tue, 2 Jan 2024 08:44:08 +0100
From: Eric Woudstra <ericwouds@...il.com>
To: Alexander Couzens <lynxis@...0.eu>,
Daniel Golle <daniel@...rotopia.org>,
Andrew Lunn <andrew@...n.ch>,
Heiner Kallweit <hkallweit1@...il.com>,
Russell King <linux@...linux.org.uk>,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>,
Matthias Brugger <matthias.bgg@...il.com>,
AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>,
Frank Wunderlich <frank-w@...lic-files.de>
Cc: netdev@...r.kernel.org,
linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org,
Eric Woudstra <ericwouds@...il.com>
Subject: [PATCH RFC net-next] net: pcs: pcs-mtk-lynxi fix mtk_pcs_lynxi_get_state() for 2500base-x
From: Daniel Golle <daniel@...rotopia.org>
Need to fix mtk_pcs_lynxi_get_state() in order for the pcs to function
correctly when the interface is set to 2500base-x, even when
PHYLINK_PCS_NEG_INBAND_DISABLED is set.
When the pcs is set to 2500base-x, the register values are not compatible
with phylink_mii_c22_pcs_decode_state(). It results in parameters such as
speed unknown and such. Then the mac/pcs are setup incorrectly and do not
function.
This is part of preveously rejected: net: pcs: pcs-mtk-lynxi:
use 2500Base-X without AN. But I believe this is not the part why it was
rejected.
fixes: net: pcs: add driver for MediaTek SGMII PCS
Changes to be committed:
modified: drivers/net/pcs/pcs-mtk-lynxi.c
Signed-off-by: Daniel Golle <daniel@...rotopia.org>
Signed-off-by: Eric Woudstra <ericwouds@...il.com>
---
drivers/net/pcs/pcs-mtk-lynxi.c | 17 +++++++++++++----
1 file changed, 13 insertions(+), 4 deletions(-)
diff --git a/drivers/net/pcs/pcs-mtk-lynxi.c b/drivers/net/pcs/pcs-mtk-lynxi.c
index 8501dd365279..dd0a1e0dbbc7 100644
--- a/drivers/net/pcs/pcs-mtk-lynxi.c
+++ b/drivers/net/pcs/pcs-mtk-lynxi.c
@@ -92,14 +92,23 @@ static void mtk_pcs_lynxi_get_state(struct phylink_pcs *pcs,
struct phylink_link_state *state)
{
struct mtk_pcs_lynxi *mpcs = pcs_to_mtk_pcs_lynxi(pcs);
- unsigned int bm, adv;
+ unsigned int bm, bmsr, adv;
/* Read the BMSR and LPA */
regmap_read(mpcs->regmap, SGMSYS_PCS_CONTROL_1, &bm);
- regmap_read(mpcs->regmap, SGMSYS_PCS_ADVERTISE, &adv);
+ bmsr = FIELD_GET(SGMII_BMSR, bm);
+
+ if (state->interface == PHY_INTERFACE_MODE_2500BASEX) {
+ state->link = !!(bmsr & BMSR_LSTATUS);
+ state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE);
+ state->speed = SPEED_2500;
+ state->duplex = DUPLEX_FULL;
+
+ return;
+ }
- phylink_mii_c22_pcs_decode_state(state, FIELD_GET(SGMII_BMSR, bm),
- FIELD_GET(SGMII_LPA, adv));
+ regmap_read(mpcs->regmap, SGMSYS_PCS_ADVERTISE, &adv);
+ phylink_mii_c22_pcs_decode_state(state, bmsr, FIELD_GET(SGMII_LPA, adv));
}
static int mtk_pcs_lynxi_config(struct phylink_pcs *pcs, unsigned int neg_mode,
--
2.42.1
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