netdev - [PATCH net 5/5] net: pcs: rzn1-miic: Init RX clock early if MAC requires it

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Message-ID: <20240103142827.168321-6-romain.gantois@bootlin.com>
Date: Wed,  3 Jan 2024 15:28:25 +0100
From: Romain Gantois <romain.gantois@...tlin.com>
To: Alexandre Torgue <alexandre.torgue@...s.st.com>,
	Jose Abreu <joabreu@...opsys.com>,
	Russell King <linux@...linux.org.uk>,
	Andrew Lunn <andrew@...n.ch>,
	Jakub Kicinski <kuba@...nel.org>,
	Heiner Kallweit <hkallweit1@...il.com>
Cc: Romain Gantois <romain.gantois@...tlin.com>,
	"David S. Miller" <davem@...emloft.net>,
	Eric Dumazet <edumazet@...gle.com>,
	Paolo Abeni <pabeni@...hat.com>,
	Maxime Coquelin <mcoquelin.stm32@...il.com>,
	Clément Léger <clement.leger@...tlin.com>,
	Marek Vasut <marex@...x.de>,
	Clark Wang <xiaoning.wang@....com>,
	Miquel Raynal <miquel.raynal@...tlin.com>,
	Sylvain Girard <sylvain.girard@...com>,
	Pascal EBERHARD <pascal.eberhard@...com>,
	netdev@...r.kernel.org,
	linux-stm32@...md-mailman.stormreply.com,
	linux-arm-kernel@...ts.infradead.org,
	linux-renesas-soc@...r.kernel.org
Subject: [PATCH net 5/5] net: pcs: rzn1-miic: Init RX clock early if MAC requires it

The GMAC1 controller in the RZN1 IP requires the RX MII clock signal to be
started before it initializes its own hardware, thus before it calls
phylink_start.

Check the rxc_always_on pcs flag and enable the clock signal during the
link validation phase.

Reported-by: Clément Léger <clement.leger@...tlin.com>
Link: https://lore.kernel.org/linux-arm-kernel/20230116103926.276869-4-clement.leger@bootlin.com/
Signed-off-by: Romain Gantois <romain.gantois@...tlin.com>
---
 drivers/net/pcs/pcs-rzn1-miic.c | 18 +++++++++++++-----
 1 file changed, 13 insertions(+), 5 deletions(-)

diff --git a/drivers/net/pcs/pcs-rzn1-miic.c b/drivers/net/pcs/pcs-rzn1-miic.c
index 97139c07130f..bf796491b826 100644
--- a/drivers/net/pcs/pcs-rzn1-miic.c
+++ b/drivers/net/pcs/pcs-rzn1-miic.c
@@ -271,12 +271,20 @@ static void miic_link_up(struct phylink_pcs *pcs, unsigned int mode,
 static int miic_validate(struct phylink_pcs *pcs, unsigned long *supported,
 			 const struct phylink_link_state *state)
 {
-	if (phy_interface_mode_is_rgmii(state->interface) ||
-	    state->interface == PHY_INTERFACE_MODE_RMII ||
-	    state->interface == PHY_INTERFACE_MODE_MII)
-		return 1;
+	int ret = 1;
 
-	return -EINVAL;
+	if (!phy_interface_mode_is_rgmii(state->interface) &&
+	    state->interface != PHY_INTERFACE_MODE_RMII &&
+	    state->interface != PHY_INTERFACE_MODE_MII)
+		return -EINVAL;
+
+	if (pcs->rxc_always_on) {
+		ret = miic_config(pcs, 0, state->interface, NULL, false);
+		if (ret)
+			pr_err("Error: Failed to init RX clock in RZN1 MIIC PCS!");
+	}
+
+	return ret;
 }
 
 static const struct phylink_pcs_ops miic_phylink_ops = {
-- 
2.43.0