netdev - Re: [PATCH v7 5/5] clk: mediatek: add drivers for MT7988 SoC

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Message-ID: <f2ee0e96fc2467fdf44b960d0ffe94c1.sboyd@kernel.org>
Date: Tue, 02 Jan 2024 16:53:13 -0800
From: Stephen Boyd <sboyd@...nel.org>
To: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>, Chen-Yu Tsai <wenst@...omium.org>, Conor Dooley <conor+dt@...nel.org>, Dan Carpenter <dan.carpenter@...aro.org>, Daniel Golle <daniel@...rotopia.org>, David S. Miller <davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>, Frank Wunderlich <frank-w@...lic-files.de>, Garmin.Chang <Garmin.Chang@...iatek.com>, Jakub Kicinski <kuba@...nel.org>, James Liao <jamesjj.liao@...iatek.com>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>, Matthias Brugger <matthias.bgg@...il.com>, Michael Turquette <mturquette@...libre.com>, Paolo Abeni <pabeni@...hat.com>, Philipp Zabel <p.zabel@...gutronix.de>, Rob Herring <robh+dt@...nel.org>, Sabrina Dubroca <sd@...asysnail.net>, Sam Shih <sam.shih@...iatek.com>, devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org, linux-mediatek@...ts.infradead.org, netdev@...r.kernel.org
Subject: Re: [PATCH v7 5/5] clk: mediatek: add drivers for MT7988 SoC

Quoting Daniel Golle (2023-12-17 13:50:15)
> From: Sam Shih <sam.shih@...iatek.com>
> 
> Add APMIXED, ETH, INFRACFG and TOPCKGEN clock drivers which are
> typical MediaTek designs.
> 
> Also add driver for XFIPLL clock generating the 156.25MHz clock for
> the XFI SerDes. It needs an undocumented software workaround and has
> an unknown internal design.
> 
> Signed-off-by: Sam Shih <sam.shih@...iatek.com>
> Signed-off-by: Daniel Golle <daniel@...rotopia.org>
> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
> ---

Applied to clk-next