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Message-ID: <DM6PR11MB4657FA0395E74A28B7A32A719B662@DM6PR11MB4657.namprd11.prod.outlook.com>
Date: Fri, 5 Jan 2024 14:56:16 +0000
From: "Kubalewski, Arkadiusz" <arkadiusz.kubalewski@...el.com>
To: Jiri Pirko <jiri@...nulli.us>, "netdev@...r.kernel.org"
<netdev@...r.kernel.org>
CC: "kuba@...nel.org" <kuba@...nel.org>, "pabeni@...hat.com"
<pabeni@...hat.com>, "davem@...emloft.net" <davem@...emloft.net>,
"edumazet@...gle.com" <edumazet@...gle.com>, "vadim.fedorenko@...ux.dev"
<vadim.fedorenko@...ux.dev>, "M, Saeed" <saeedm@...dia.com>,
"leon@...nel.org" <leon@...nel.org>, "Michalik, Michal"
<michal.michalik@...el.com>, "rrameshbabu@...dia.com"
<rrameshbabu@...dia.com>
Subject: RE: [patch net-next 0/3] dpll: expose fractional frequency offset
value to user
>From: Jiri Pirko <jiri@...nulli.us>
>Sent: Wednesday, January 3, 2024 2:29 PM
>
>From: Jiri Pirko <jiri@...dia.com>
>
>Allow to expose pin fractional frequency offset value over new DPLL generic
>netlink attribute. Add an op to get the value from the driver.
>Implement this new op in mlx5 driver.
>
>Jiri Pirko (3):
> dpll: expose fractional frequency offset value to user
> net/mlx5: DPLL, Use struct to get values from
> mlx5_dpll_synce_status_get()
> net/mlx5: DPLL, Implement fractional frequency offset get pin op
>
> Documentation/netlink/specs/dpll.yaml | 11 +++
> drivers/dpll/dpll_netlink.c | 24 +++++
> .../net/ethernet/mellanox/mlx5/core/dpll.c | 94 ++++++++++++-------
> include/linux/dpll.h | 3 +
> include/uapi/linux/dpll.h | 1 +
> 5 files changed, 98 insertions(+), 35 deletions(-)
>
>--
>2.43.0
Sure, LGTM.
Acked-By: Arkadiusz Kubalewski <arkadiusz.kubalewski@...el.com>
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