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Message-ID: <458ded82-b200-4946-9b22-31cda68f1c8c@linaro.org>
Date: Wed, 10 Jan 2024 13:13:58 +0100
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Luo Jie <quic_luoj@...cinc.com>, andersson@...nel.org,
 konrad.dybcio@...aro.org, robh+dt@...nel.org,
 krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org, netdev@...r.kernel.org,
 quic_kkumarcs@...cinc.com, quic_suruchia@...cinc.com, quic_soni@...cinc.com,
 quic_pavir@...cinc.com, quic_souravp@...cinc.com, quic_linchen@...cinc.com,
 quic_leiwei@...cinc.com
Subject: Re: [PATCH 0/6] Add PPE device tree node for Qualcomm IPQ SoC

On 10/01/2024 12:20, Luo Jie wrote:
> The PPE(packet process engine) hardware block is supported by Qualcomm
> IPQ platforms, such as IPQ9574 and IPQ5332. The PPE includes the various
> packet processing modules such as the routing and bridging flow engines,
> L2 switch capability, VLAN and tunnels. Also included are integrated
> ethernet MAC and PCS(uniphy), which is used to connect with the external
> PHY devices by PCS.
> 
> This patch series enables support for the following DTSI functionality
> for Qualcomm IPQ9574 and IPQ5332 chipsets. 
> 
> 1. Add PPE (Packet Processing Engine) HW support
> 
> 2. Add IPQ9574 RDP433 board support, where the PPE is connected
>    with qca8075 PHY and AQ PHY.
> 
> 3. Add IPQ5332 RDP441 board support, where the PPE is connected
>    with qca8386 and SFP
> 
> PPE DTS depends on the NSSCC clock driver below, which provides the
> clocks for the PPE driver.

DTS cannot depend on clock drivers. Maybe you meant that it depends on
NSSCC clock controller DTS changes, which would be fine. However
depending on drivers is neither necessary nor allowed.

Best regards,
Krzysztof


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